From 11d6741e7942621db1aa526944ede60e1e9da197 Mon Sep 17 00:00:00 2001
From: Nick Vaccaro <nvaccaro@google.com>
Date: Fri, 11 Jun 2021 18:02:15 -0700
Subject: mb/google/volteer/var/delbin: change GPP_B2 to PLTRST
Change GPP_B2 (EN_PP3300_SSD) to PLTRST to avoid S3 resume hang.
Add GPP_B2 to the early_gpio_table.
BUG=b:174776411
BRANCH=none
TEST=none
Change-Id: Ifb6b5b14cec9e6f7c68aa9b01621fdb21c885552
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55438
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
---
src/mainboard/google/volteer/variants/delbin/gpio.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/google/volteer/variants/delbin/gpio.c b/src/mainboard/google/volteer/variants/delbin/gpio.c
index dbf4677511..8c25936507 100644
--- a/src/mainboard/google/volteer/variants/delbin/gpio.c
+++ b/src/mainboard/google/volteer/variants/delbin/gpio.c
@@ -28,7 +28,7 @@ static const struct pad_config override_gpio_table[] = {
PAD_CFG_NF(GPP_A23, NONE, DEEP, NF1),
/* B2 : VRALERT# ==> EN_PP3300_SSD */
- PAD_CFG_GPO(GPP_B2, 1, DEEP),
+ PAD_CFG_GPO(GPP_B2, 1, PLTRST),
/* B9 : I2C5_SDA ==> PCH_I2C5_TRACKPAD_SDA */
PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
/* B10 : I2C5_SCL ==> PCH_I2C5_TRACKPAD_SCL */
@@ -138,6 +138,8 @@ static const struct pad_config early_gpio_table[] = {
/* A17 : DDSP_HPDC ==> MEM_CH_SEL */
PAD_CFG_GPI(GPP_A17, NONE, DEEP),
+ /* B2 : VRALERT# ==> EN_PP3300_SSD */
+ PAD_CFG_GPO(GPP_B2, 1, PLTRST),
/* B11 : PMCALERT# ==> PCH_WP_OD */
PAD_CFG_GPI_GPIO_DRIVER(GPP_B11, NONE, DEEP),
/* B15 : GSPI0_CS0# ==> PCH_GSPI0_H1_TPM_CS_L */
--
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