From 0f30063abf4fa29ba6671dcbab7879334f7bd013 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 19 Dec 2020 23:43:56 +0200 Subject: soc/intel/broadwell: Conditionally skip PRE_GRAPHICS_DELAY MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It was commented that the need for the delay was mainly related to external displays and only with VBIOS execution. Move the delay such that it is done only when we actually need to execute the VBIOS aka option rom. A delay is currently only defined for librem/purism_bdw in its Kconfig. As the description of the issue sounds like it would equally happen on other platforms when VBIOS is involved, promote the Kconfig visible option to global scope. Change-Id: I4503158576f35057373f003586bbf76af4d59b3d Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/48787 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/device/Kconfig | 10 ++++++++++ src/device/pci_device.c | 9 +++++++++ src/northbridge/intel/haswell/Kconfig | 9 --------- src/northbridge/intel/haswell/gma.c | 1 - src/soc/intel/broadwell/Kconfig | 9 --------- src/soc/intel/broadwell/gma.c | 6 ------ 6 files changed, 19 insertions(+), 25 deletions(-) diff --git a/src/device/Kconfig b/src/device/Kconfig index 0e5de456ae..421ad66fea 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -117,6 +117,16 @@ config NO_GFX_INIT endchoice +config PRE_GRAPHICS_DELAY + int "Graphics initialization delay in ms" + default 0 + depends on VGA_ROM_RUN + help + On some systems, coreboot boots so fast that connected monitors + (mostly TVs) won't be able to wake up fast enough to talk to the + VBIOS. On those systems we need to wait for a bit before executing + the VBIOS. + config ONBOARD_VGA_IS_PRIMARY bool "Use onboard VGA as primary video device" default n diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 66f5447126..cd98f07605 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -732,6 +732,12 @@ static int should_load_oprom(struct device *dev) return 0; } +static void oprom_pre_graphics_stall(void) +{ + if (CONFIG_PRE_GRAPHICS_DELAY) + mdelay(CONFIG_PRE_GRAPHICS_DELAY); +} + /** Default handler: only runs the relevant PCI BIOS. */ void pci_dev_init(struct device *dev) { @@ -760,6 +766,9 @@ void pci_dev_init(struct device *dev) if (!should_run_oprom(dev, rom)) return; + /* Wait for any configured pre-graphics delay */ + oprom_pre_graphics_stall(); + run_bios(dev, (unsigned long)ram); gfx_set_init_done(1); diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig index 28b7551e81..dcc9162fd0 100644 --- a/src/northbridge/intel/haswell/Kconfig +++ b/src/northbridge/intel/haswell/Kconfig @@ -90,15 +90,6 @@ config HASWELL_HIDE_PEG_FROM_MRC However, it prevents MRC from programming PEG AFE registers, which can make PEG devices unstable. When unsure, choose N. -config PRE_GRAPHICS_DELAY - int "Graphics initialization delay in ms" - default 0 - help - On some systems, coreboot boots so fast that connected monitors - (mostly TVs) won't be able to wake up fast enough to talk to the - VBIOS. On those systems we need to wait for a bit before executing - the VBIOS. - # The UEFI System Agent binary needs to be at a fixed offset in the flash # and can therefore only reside in the COREBOOT fmap region config RO_REGION_ONLY diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 3746fe35cc..e69cfec6de 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -444,7 +444,6 @@ static void gma_func0_init(struct device *dev) if (!lightup_ok) { printk(BIOS_SPEW, "FUI did not run; using VBIOS\n"); - mdelay(CONFIG_PRE_GRAPHICS_DELAY); pci_dev_init(dev); } diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 20254d5564..4b9af49a5c 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -141,15 +141,6 @@ config RO_REGION_ONLY endif # HAVE_MRC -config PRE_GRAPHICS_DELAY - int "Graphics initialization delay in ms" - default 0 - help - On some systems, coreboot boots so fast that connected monitors - (mostly TVs) won't be able to wake up fast enough to talk to the - VBIOS. On those systems we need to wait for a bit before executing - the VBIOS. - config INTEL_PCH_UART_CONSOLE bool "Use Serial IO UART for console" default n diff --git a/src/soc/intel/broadwell/gma.c b/src/soc/intel/broadwell/gma.c index b6ce426cde..59379b576b 100644 --- a/src/soc/intel/broadwell/gma.c +++ b/src/soc/intel/broadwell/gma.c @@ -513,12 +513,6 @@ static void igd_init(struct device *dev) if (!CONFIG(NO_GFX_INIT)) pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); - /* Wait for any configured pre-graphics delay */ - if (!acpi_is_wakeup_s3()) { - if (!CONFIG(CHROMEOS) || display_init_required()) - mdelay(CONFIG_PRE_GRAPHICS_DELAY); - } - /* Early init steps */ if (is_broadwell) { reg_script_run_on_dev(dev, broadwell_early_init_script); -- cgit v1.2.3