From 0c78f4c05a220cd7475ce2430ef28d31ef2922b3 Mon Sep 17 00:00:00 2001 From: Werner Zeh Date: Thu, 5 May 2022 14:56:07 +0200 Subject: soc/intel/cmn/fast-spi: Add BIOS MMIO window as reserved region Add the boot flash MMIO window to the resources to report this region as reserved to the OS. This is done to stay consistent with the reserved memory ranges by coreboot and make the OS aware of them. As x86 systems preserves the upper 16 MiB below 4G for BIOS flash decoding use the complete window for reporting independent of the actually used SPI flash size. This will block the preserved MMIO window. Change-Id: Ib3a77e9233c3c63bad4de926670edb4545ceaddf Signed-off-by: Werner Zeh Reviewed-on: https://review.coreboot.org/c/coreboot/+/64077 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Arthur Heymans --- src/soc/intel/common/block/fast_spi/fast_spi.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 3dc74408dc..c07b565d8c 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -22,6 +22,9 @@ #include #include +#define FLASH_MMIO_SIZE (16 * MiB) +#define FLASH_BASE_ADDR ((0xffffffff - FLASH_MMIO_SIZE) + 1) + /* * Get the FAST_SPIBAR. */ @@ -514,8 +517,18 @@ static void fast_spi_fill_ssdt(const struct device *dev) acpigen_pop_len(); /* Scope */ } + +static void fast_spi_read_resources(struct device *dev) +{ + /* Read standard PCI resources. */ + pci_dev_read_resources(dev); + + /* Add SPI flash MMIO window as a reserved resource. */ + mmio_resource(dev, 0, FLASH_BASE_ADDR / KiB, FLASH_MMIO_SIZE / KiB); +} + static struct device_operations fast_spi_dev_ops = { - .read_resources = pci_dev_read_resources, + .read_resources = fast_spi_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .acpi_fill_ssdt = fast_spi_fill_ssdt, -- cgit v1.2.3