From 0810538b63e87bec519f991ffb9e6181e7fe4821 Mon Sep 17 00:00:00 2001
From: Felix Held <felix-coreboot@felixheld.de>
Date: Tue, 16 Feb 2021 18:46:01 +0100
Subject: soc/amd/cezanne/pcie_gpp: add pci_driver for external root ports

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic63ca41ae484cc34c560cf78de37dc1cde32f364
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50805
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/amd/cezanne/pcie_gpp.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/src/soc/amd/cezanne/pcie_gpp.c b/src/soc/amd/cezanne/pcie_gpp.c
index 00fbffb9f8..0a6bfe26db 100644
--- a/src/soc/amd/cezanne/pcie_gpp.c
+++ b/src/soc/amd/cezanne/pcie_gpp.c
@@ -3,6 +3,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
+#include <device/pciexp.h>
 
 static struct device_operations internal_pcie_gpp_ops = {
 	.read_resources		= pci_bus_read_resources,
@@ -17,3 +18,23 @@ static const struct pci_driver internal_pcie_gpp_driver __pci_driver = {
 	.vendor			= PCI_VENDOR_ID_AMD,
 	.device			= PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_BUSABC,
 };
+
+static struct device_operations external_pcie_gpp_ops = {
+	.read_resources		= pci_bus_read_resources,
+	.set_resources		= pci_dev_set_resources,
+	.enable_resources	= pci_bus_enable_resources,
+	.scan_bus		= pciexp_scan_bridge,
+	.reset_bus		= pci_bus_reset,
+};
+
+static const unsigned short external_pci_gpp_ids[] = {
+	PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_D1,
+	PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_D2,
+	0
+};
+
+static const struct pci_driver external_pcie_gpp_driver __pci_driver = {
+	.ops			= &external_pcie_gpp_ops,
+	.vendor			= PCI_VENDOR_ID_AMD,
+	.devices		= external_pci_gpp_ids,
+};
-- 
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