From 07bce4ba36cb17ef5e9958097680b66326a3af5b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 21 Dec 2020 07:51:59 +0200 Subject: coreboot_table: Convert some CONFIG(CHROMEOS) preprocessor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I0c42720fdcc3b05337af692ed93a424575defd36 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/48786 Reviewed-by: Arthur Heymans Reviewed-by: Duncan Laurie Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/lib/coreboot_table.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 86e0606396..00d73a009b 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -189,10 +189,8 @@ static void lb_gpios(struct lb_header *header) } } -#if CONFIG(CHROMEOS) static void lb_vbnv(struct lb_header *header) { -#if CONFIG(PC80_SYSTEM) struct lb_range *vbnv; vbnv = (struct lb_range *)lb_new_record(header); @@ -200,9 +198,7 @@ static void lb_vbnv(struct lb_header *header) vbnv->size = sizeof(*vbnv); vbnv->range_start = CONFIG_VBOOT_VBNV_OFFSET + 14; vbnv->range_size = VBOOT_VBNV_BLOCK_SIZE; -#endif } -#endif /* CONFIG_CHROMEOS */ __weak uint32_t board_id(void) { return UNDEFINED_STRAPPING_ID; } __weak uint32_t ram_code(void) { return UNDEFINED_STRAPPING_ID; } @@ -490,10 +486,9 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end) if (CONFIG(CHROMEOS)) lb_gpios(head); -#if CONFIG(CHROMEOS) /* pass along VBNV offsets in CMOS */ - lb_vbnv(head); -#endif + if (CONFIG(CHROMEOS) && CONFIG(PC80_SYSTEM)) + lb_vbnv(head); /* Pass mmc early init status */ lb_mmc_info(head); -- cgit v1.2.3