From 073b017bed5e51244f0578056d52e6f88734d64b Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Sun, 12 Jul 2015 11:39:45 +0200 Subject: intel raminit: whitespace fixes Remove whitespace errors. Change-Id: If69244a5d47424e3e984fdf782ea9d2d3c466d86 Signed-off-by: Patrick Rudolph Reviewed-on: http://review.coreboot.org/10888 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Nicolas Reinecke --- src/northbridge/intel/sandybridge/raminit_native.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c index 3740a02706..02825f8197 100644 --- a/src/northbridge/intel/sandybridge/raminit_native.c +++ b/src/northbridge/intel/sandybridge/raminit_native.c @@ -2370,16 +2370,16 @@ static void adjust_high_timB(ramctr_timing * ctrl) wait_428c(channel); FOR_ALL_LANES { u64 res = - read32(DEFAULT_MCHBAR + lane_registers[lane] + - 0x100 * channel + 4); - res |= - ((u64) read32(DEFAULT_MCHBAR + lane_registers[lane] + - 0x100 * channel + 8)) << 32; - ctrl->timings[channel][slotrank].lanes[lane].timB += - get_timB_high_adjust(res) * 64; - - printk(BIOS_DEBUG, "High adjust %d:%016llx\n", lane, res); - printram("Bval+: %d, %d, %d, %x\n", channel, + read32(DEFAULT_MCHBAR + lane_registers[lane] + + 0x100 * channel + 4); + res |= + ((u64) read32(DEFAULT_MCHBAR + lane_registers[lane] + + 0x100 * channel + 8)) << 32; + ctrl->timings[channel][slotrank].lanes[lane].timB += + get_timB_high_adjust(res) * 64; + + printk(BIOS_DEBUG, "High adjust %d:%016llx\n", lane, res); + printram("Bval+: %d, %d, %d, %x\n", channel, slotrank, lane, ctrl->timings[channel][slotrank].lanes[lane]. timB); -- cgit v1.2.3