summaryrefslogtreecommitdiff
path: root/util/superiotool
AgeCommit message (Collapse)Author
2024-09-30util/superiotool/ite: Add extra dumps for IT8613E ECMichał Żygowski
IT8613E EC space is divided into 3 banks selectable by EC index 0x06 bits 6:5. Bank0 mostly contains the ITE EC registers known by coreboot's ITE EC driver. Bank1 contains SB_TSI and PECI temperature reading registers. Bank2, however, contains additional registers used to select the temperature source reported in TMPIN reading registers, PECI bridge registers as well as FAN2-5 controls and extra vectors. Dump the additional banks using extra-selectors. Based on non-public IT8613E Preliminary Specification V0.3. TEST=Perform the IT8613E dump on Hardkernel ODROID H4+. Change-Id: Ic8fdc56d1b0fbe811e13bc6b800512af654c1cb6 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80318 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Maxim <max.senia.poliak@gmail.com> Reviewed-by: Alicja Michalska <ahplka19@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Marvin Drees <marvin.drees@9elements.com>
2024-08-01util/superiotool/fintek: Add missing F81804 name for 0x0215 idMaxim Polyakov
"0x1502 F81804 chipset ID, same for F81966" in https://web.archive.org/web/20240628153609/https://github.com/torvalds/ linux/blob/master/drivers/gpio/gpio-f7188x.c Change-Id: I6889ad8ad861465316333ff997956a05b74c5855 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83018 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-07-31util/superiotool/fintek: Add f81966 register tableMaxim Polyakov
In accordance with the F81962/F81964/F81966/F81967 datasheet: Release Date: Feb, 2018, Version: V0.18P [1]. [1] https://web.archive.org/web/20240707052102/http:// www.jetwaycomputer.com/download/Fintek/F81966_wdt_gpio.zip Change-Id: Ic3418c337883538e47eb181cbe1ad2dc828e12a1 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83019 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2024-07-31util/superiotool/fintek: Add f81866 register tableMaxim Polyakov
In accordance with the F81866A datasheet: Release Date: Jan, 2012, Version: V0.14P [1]. [1] https://web.archive.org/web/20240707051837/http://www. jetwaycomputer.com/download/Fintek/F81866_wdt_gpio.zip Change-Id: I4367a1129fe628e7bf05d49678ea1c3718da710b Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83004 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-07-31util/superiotool: Add extra selectors supportMaxim Polyakov
Some chips (fintek [1,2]) have registers with specific selector-fields that can affect the address space of the device (for example, switch the register bank). At the same time, these registers contain fields that should not change after they are configured in BIOS (for example, set the port to 2E/2F or 4E/4F). In this case, the selector should take into account the mask of the register fields and there is no convenient and easy way to add this in the code in the utility. The selector-fields should be set manually before the dump and this action is done several times. This patch adds an extra-selector mechanism that allows superiotool to make a correct dump in automatic mode. Just add a structure with an index, mask, and value for the selector inside the superio_registers chip for the corresponding LDN to switch the register bank: {FINTEK_F81966_DID, "F81962/F81964/F81966/F81967", { * * * {NOLDN, "Global", {0x28,0x2a,0x2b,0x2c,EOT}, {0x00,0x00,0x00,0x00,EOT}, {.idx = 0x27, .mask = 0xd, .val = 0x1} /* update extra selector */ }, {0x03, "LPT", {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, {NANA,0x03,0x78,0x07,0x03,0xc2,EOT} /* without extra selector */ }, * * * Tested with Fintek F81966 on Asrock IMB-1222: - run superiotool on Ubuntu and dump the registers for the board with the vendor's firmware; - add the superio chip initialization code to the board configuration in coreboot and build the project; - boot Ubuntu on the board with coreboot and re-dump the registers; - the register values from the board configuration code are the same in both dumps. Found Fintek F81962/F81964/F81966/F81967 (vid=0x3419, id=0x0215) at 0x2e (Global) -- ESEL[27h] 0x00 (Port Select Register) -- idx 02 07 20 21 23 24 25 26 27 28 29 2a 2b 2c 2d val 00 0b 15 02 19 34 5a 23 80 a0 f0 45 02 e3 2e def NA 00 15 02 19 34 00 23 02 a0 00 00 02 0c 28 * * * The changes do not affect the configuration of existing chips, which was tested on the Asrock H110-STX motherboard with Nuvoton NCT5539D (the dump before and after the changes are the same). [1] CB:83004 [2] CB:83019 Change-Id: If56af9f977381e637245bdd26563f5ba7e6cbead Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83196 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-06-09util/superiotool: Add support for dumping ITE IT8659E configurationMichał Żygowski
Based on the non-public "ITE IT8659E-I Preliminary Specification V0.7.2 (For H Version)". TEST=Dump IT8659E configuration on the new Protectli platform Change-Id: Ic036f8b99d5bd0107be7850fc4509da1bf020fe5 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80495 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2024-05-29util/superiotool: Use c11 dialectElyes Haouas
Change-Id: Ic03d9ac883a92d52467d563f048446871b928712 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82678 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2024-01-18util/superiotool: reformat alternate dump outputMatt DeVillier
Reformat alternate dump output to show default values before read values, and to use brackets to visually indicate which values differ from the defaults. old output: Register dump: idx val def 0x07: 0x0b (0x00) 0x10: 0xff (0xff) 0x11: 0xff (0xff) ... new output: Register dump: idx def val 0x07: 0x00 [0x0b] 0x10: 0xff 0xff 0x11: 0xff 0xff ... TEST=build/dump registers from Erying SRMJ4 w/Nuvoton NCT6796D. Change-Id: Idef2cc136151328b114620eb297ab8fd62b71bcd Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80004 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2024-01-18util/superiotool: add support for Nuvoton NCT6796DMatt DeVillier
Registers and default values taken from public datasheet: https://www.nuvoton.com/resource-files/NCT6796D_Datasheet_V0_6.pdf TEST=build/dump SIO registers on Erying SRMJ4 mainboard Change-Id: I0ff940a17b0c38a5ca66e90dd4e075a2b04dcfc1 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80003 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-09-20util/superiotool: Tell compiler to use C99 instead of ANSI CNicholas Sudsgaard
Fails to build on musl libc as pci/types.h expects "POSIX types", which are not implemented, instead of stdint.h when using pre-C99 versions. Change-Id: Id1cf5bd72a0b4d76c87dc62c443d02df18ddd3fe Signed-off-by: Nicholas Sudsgaard <devel@nsudsgaard.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77791 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-09superiotool/ite: Add IT8784E supportMichał Żygowski
IT8784E is basically a IT8786E stripped from serial ports 3-6. There are very few minor register differences in EC IO space and GPIO LDN, which are covered by this patch. Based on IT8784E-I Preliminary Specification V0.7.1 (non-public). TEST=Dump SIO configuration on Protectli VP4670 (vault_cml). Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I5de8aeaff9697b854281391083f77a1083d12fe6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74172 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-05-22util: Use common ARRAY_SIZE defineKonrad Adamczyk
Remove duplicated definitions of ARRAY_SIZE macro across util/ dir. Instead of duplicates, use the one from commonlib/bsd/helpers.h file. BUG=b:231765496 TEST=make -C util/cbfstool; make -C util/cbmem; make -C util/intelmetool; make -C util/superiotool Change-Id: I29b776586b4f0548d4026b2ac77095791fc9f3a3 Signed-off-by: Konrad Adamczyk <konrada@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74474 Reviewed-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-by: Grzegorz Bernacki Reviewed-by: Robert Zieba <robertzieba@google.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-03-12util/superiotool: Fix build on musl-libc systemsFabian Groffen
- use __linux__ instead of __GLIBC__ guard for Linux-specific includes - use POSIX ioperm instead of deprecated iopl Signed-off-by: Fabian Groffen <grobian@gentoo.org> Change-Id: I99613007aa9feddcb1041f31085cdeb195ff7a68 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73358 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-12-09util/superiotool/Makefile: improve cross-compilation supportMaciej Gabryelski
Use tool from INSTALL variable to create directory instead of mkdir to be compatible with other cross-compilation buildsystems (like Yocto). Signed-off-by: Maciej Gabryelski <maciej.gabryelski@3mdeb.com> Change-Id: I9d455f3d1a6d86c88b8e22da825fe14f9630e971 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70103 Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-13util/superiotool: Add SMSC MEC5035Nicholas Chin
Also comment out the SMSC FDC37M602 which has a conflicting ID and has never had the LDN/register layout anyway. Tested on a Dell Latitude E6400 Change-Id: I5b1900e6ef599c422a1d6eca7a2ac4691d56d874 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69481 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-13util/superiotool: Add Nuvoton NCT6685D/NCT6686DNicholas Chin
There doesn't seem to be a datasheet available for the NCT6685D, but there is one for the NCT6686D. The 85D seems to return the same ID as the 86D, and the registers do seem to be returning valid data other than LDN 0xf which returns all 1s. The LDN and register layout appears to be identical to the NCT6687D-W. Tested on a Lenovo ThinkCentre M900 with a NCT6685D. Change-Id: I4de0e7b86422a14ab9ccb15b7571597611d755d5 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69480 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-11-07util/superiotool/fintek.c: Fix F71808A hardware monitor readoutsRavi Mistry
Fix readouts from the hardware monitor on Fintek F71808A Super I/O. The HWM port is +5 to the base address stored in LDN 0x4 at index 0x60/0x61. Referred to util/superiotool/winbond.c and the Linux kernel driver f71882fg. Tested on a HP 500-319na (Memphis-S / IPM87-MP). Signed-off-by: Ravi Mistry <rvstry@protonmail.com> Change-Id: I2b2b98c62f9305c6f4885c2ce3b1444801dcb9d5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62060 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-10-24util/superiotool/nuvoton.c: fix NCT6687D PP LDN typoMichał Żygowski
Parallel Port has LDN 1 and Serial Pot has LDN 2. Fix typo made in the patch adding register definitions for NCT6687D Super I/O chip. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: If850d2a0a03bd41e3d855f347fd182831bcfcdca Reviewed-on: https://review.coreboot.org/c/coreboot/+/68710 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-10-12util/superiotool/nuvoton.c: Add NCT6687D-W register definitionsMichał Żygowski
Based on public NCT6686D hardware datasheet revision 0.5 which should be similar to NCT6687D. TEST=Dump NCT6687D, GPIO and EC registers on MSI PRO Z690-A WIFI DDR4 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I38db1de0f3d3b6de14bcb758afc9804c072c1895 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63868 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
2022-04-06superiotool/ite: add IT8625E EC registersMichał Kopeć
Add support for dumping ITE IT8625E Environmental Controller registers. Values as per "IT8625E Preliminary Specification V0.3 (For D Version)". Change-Id: I68aad90097206c6b8ef40075530c00809d9511e2 Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63310 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2021-02-12util/superiotool: Add ITE IT8616E/IT8656E supportAngel Pons
Datasheet is not publicly available. Derive which registers to dump from IT8625E, since there are mainboards that can use either chip depending on BOM configuration. Default values are taken from an HP 280 G2 running a coreboot build that does not configure the Super I/O. Change-Id: Icc8c56e9cd19e940e85176ac51b8ef978275eb71 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50457 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-02-12util/superiotool: Add ITE IT8625E supportAngel Pons
Values as per "IT8625E Preliminary Specification V0.3 (For D Version)". Change-Id: Ic3ff13d93f66d09a1f2ea953736336b201a7114c Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50456 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-27superiotool: Add ID for Nuvoton NCT6797DClay
Test Result: clay@clay-MS-7C37:~$ sudo superiotool [sudo] password for clay: superiotool r4.13-823-g221351f81b Found Nuvoton NCT6797D (id=0xd451) at 0x4e Change-Id: I1a5f962f2fd9dc479ddbbaf5e1bebea2c7c9e03f Signed-off-by: Clay <clay.daniels.jr@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49112 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-13util/superiotool: add IT5570E registersMichael Niewöhner
Add registers from IT5570E datsheet v0.3.1. Tested on Clevo L141CU. Change-Id: Idc764c6180e235298835d7639fcb0b562a2c21a4 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48922 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-12util/superiotool: Add IT8720F EC registersMichael Büchler
Registers and their default values are from the datasheet ("IT8720F", "Preliminary Specification V0.1"). Tested on an Acer G43T-AM3. Signed-off-by: Michael Büchler <michael.buechler@posteo.net> Change-Id: I69987be4f5cb50b3c20f06733f30b308891d5ad0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44985 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-10superiotool/nuvoton: Set NCT6791D GPIO inputs to NANANico Huber
There were several default values given for GPIO data and status registers. As all GPIO are configured as inputs by default, we can't predict the values of these registers, hence set their default values to NANA. Change-Id: I0507dd75e0f2a5c7e4d2e9cdbe1f860b544deac3 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49241 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Clay Daniels <clay.daniels.jr@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-10-31.gitignore: Ignore .test/.dependencies globallyPatrick Georgi
These were originally ignored only inside util/ but these files shouldn't be tracked anywhere. Change-Id: Ie0846bd8bdd6e52f420f9dd2e72a8a922102ff90 Signed-off-by: Patrick Georgi <patrick@georgi.software> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47012 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-10-30.gitignore: Split into subdirectory filesPatrick Georgi
There's no need for the global list of files to ignore, so use git's ability to work with more local configuration. Change-Id: I50882e6756cbc0fdfd899353cc23962544690fb3 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46879 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Christian Walter <christian.walter@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-12util/superiotool: Add EC registers for IT8728FMatt DeVillier
Add support for dumping registers, default values for EC on ITE IT8128F. Taken from datasheet 'IT8728F V0.4.2' Test: 'superiotool -d -e' on board with IT8728F Super IO Change-Id: I7074b740565edf458d6894c066b61c083a657cb8 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44417 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-05-11util: Add SPDX header, replacing boiler plate where applicablePatrick Georgi
In a few cases a license was added: Stuff coming from Linux is "GPL-2.0" (not GPL-2.0-only!), build-release is by me and got the usual GPL-2.0-only treatment. uio_usbdebug and spkmodem had their licenses propagate to all their files. Change-Id: Ia5712bbaa417cb9e937834512351fcc0acfa16be Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41202 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-09util/: Replace GPLv2 boiler plate with SPDX headerPatrick Georgi
Used commands: perl -i -p0e 's|\/\*[\s*]*.*is free software[:;][\s*]*you[\s*]*can[\s*]*redistribute[\s*]*it[\s*]*and\/or[\s*]*modify[\s*]*it[\s*]*under[\s*]*the[\s*]*terms[\s*]*of[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*as[\s*]*published[\s*]*by[\s*]*the[\s*]*Free[\s*]*Software[\s*]*Foundation[;,][\s*]*version[\s*]*2[\s*]*of[\s*]*the[\s*]*License.[\s*]*This[\s*]*program[\s*]*is[\s*]*distributed[\s*]*in[\s*]*the[\s*]*hope[\s*]*that[\s*]*it[\s*]*will[\s*]*be[\s*]*useful,[\s*]*but[\s*]*WITHOUT[\s*]*ANY[\s*]*WARRANTY;[\s*]*without[\s*]*even[\s*]*the[\s*]*implied[\s*]*warranty[\s*]*of[\s*]*MERCHANTABILITY[\s*]*or[\s*]*FITNESS[\s*]*FOR[\s*]*A[\s*]*PARTICULAR[\s*]*PURPOSE.[\s*]*See[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*for[\s*]*more[\s*]*details.[\s*]*\*\/|/* SPDX-License-Identifier: GPL-2.0-only */|' $(cat filelist) perl -i -p0e 's|This[\s*]*program[\s*]*is[\s*]*free[\s*]*software[:;][\s*]*you[\s*]*can[\s*]*redistribute[\s*]*it[\s*]*and/or[\s*]*modify[\s*]*it[\s*]*under[\s*]*the[\s*]*terms[\s*]*of[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*as[\s*]*published[\s*]*by[\s*]*the[\s*]*Free[\s*]*Software[\s*]*Foundation[;,][\s*]*either[\s*]*version[\s*]*2[\s*]*of[\s*]*the[\s*]*License,[\s*]*or[\s*]*.at[\s*]*your[\s*]*option.*[\s*]*any[\s*]*later[\s*]*version.[\s*]*This[\s*]*program[\s*]*is[\s*]*distributed[\s*]*in[\s*]*the[\s*]*hope[\s*]*that[\s*]*it[\s*]*will[\s*]*be[\s*]*useful,[\s*]*but[\s*]*WITHOUT[\s*]*ANY[\s*]*WARRANTY;[\s*]*without[\s*]*even[\s*]*the[\s*]*implied[\s*]*warranty[\s*]*of[\s*]*MERCHANTABILITY[\s*]*or[\s*]*FITNESS[\s*]*FOR[\s*]*A[\s*]*PARTICULAR[\s*]*PURPOSE.[\s*]*See[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*for[\s*]*more[\s*]*details.[\s*]*\*\/|/* SPDX-License-Identifier: GPL-2.0-or-later */|' $(cat filelist) perl -i -p0e 's|\/\*[\s*]*.*This[\s*#]*program[\s*#]*is[\s*#]*free[\s*#]*software[;:,][\s*#]*you[\s*#]*can[\s*#]*redistribute[\s*#]*it[\s*#]*and/or[\s*#]*modify[\s*#]*it[\s*#]*under[\s*#]*the[\s*#]*terms[\s*#]*of[\s*#]*the[\s*#]*GNU[\s*#]*General[\s*#]*Public[\s*#]*License[\s*#]*as[\s*#]*published[\s*#]*by[\s*#]*the[\s*#]*Free[\s*#]*Software[\s*#]*Foundation[;:,][\s*#]*either[\s*#]*version[\s*#]*3[\s*#]*of[\s*#]*the[\s*#]*License[;:,][\s*#]*or[\s*#]*.at[\s*#]*your[\s*#]*option.*[\s*#]*any[\s*#]*later[\s*#]*version.[\s*#]*This[\s*#]*program[\s*#]*is[\s*#]*distributed[\s*#]*in[\s*#]*the[\s*#]*hope[\s*#]*that[\s*#]*it[\s*#]*will[\s*#]*be[\s*#]*useful[;:,][\s*#]*but[\s*#]*WITHOUT[\s*#]*ANY[\s*#]*WARRANTY[;:,][\s*#]*without[\s*#]*even[\s*#]*the[\s*#]*implied[\s*#]*warranty[\s*#]*of[\s*#]*MERCHANTABILITY[\s*#]*or[\s*#]*FITNESS[\s*#]*FOR[\s*#]*A[\s*#]*PARTICULAR[\s*#]*PURPOSE.[\s*#]*See[\s*#]*the[\s*#]*GNU[\s*#]*General[\s*#]*Public[\s*#]*License[\s*#]*for[\s*#]*more[\s*#]*details.[\s*]*\*\/|/* SPDX-License-Identifier: GPL-3.0-or-later */|' $(cat filelist) perl -i -p0e 's|(\#\#*)[\w]*.*is free software[:;][\#\s]*you[\#\s]*can[\#\s]*redistribute[\#\s]*it[\#\s]*and\/or[\#\s]*modify[\#\s]*it[\s\#]*under[\s \#]*the[\s\#]*terms[\s\#]*of[\s\#]*the[\s\#]*GNU[\s\#]*General[\s\#]*Public[\s\#]*License[\s\#]*as[\s\#]*published[\s\#]*by[\s\#]*the[\s\#]*Free[\s\#]*Software[\s\#]*Foundation[;,][\s\#]*version[\s\#]*2[\s\#]*of[\s\#]*the[\s\#]*License.*[\s\#]*This[\s\#]*program[\s\#]*is[\s\#]*distributed[\s\#]*in[\s\#]*the[\s\#]*hope[\s\#]*that[\s\#]*it[\s\#]*will[\#\s]*be[\#\s]*useful,[\#\s]*but[\#\s]*WITHOUT[\#\s]*ANY[\#\s]*WARRANTY;[\#\s]*without[\#\s]*even[\#\s]*the[\#\s]*implied[\#\s]*warranty[\#\s]*of[\#\s]*MERCHANTABILITY[\#\s]*or[\#\s]*FITNESS[\#\s]*FOR[\#\s]*A[\#\s]*PARTICULAR[\#\s]*PURPOSE.[\#\s]*See[\#\s]*the[\#\s]*GNU[\#\s]*General[\#\s]*Public[\#\s]*License[\#\s]*for[\#\s]*more[\#\s]*details.\s(#* *\n)*|\1 SPDX-License-Identifier: GPL-2.0-only\n\n|' $(cat filelist) perl -i -p0e 's|(\#\#*)[\w*]*.*is free software[:;][\s*]*you[\s*]*can[\s*]*redistribute[\s*]*it[\s*]*and\/or[\s*]*modify[\s*]*it[\s*]*under[\s*]*the[\s*]*terms[\s*]*of[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*as[\s*]*published[\s*]*by[\s*]*the[\s*]*Free[\s*]*Software[\s*]*Foundation[;,][\s*]*version[\s*]*2[\s*]*of[\s*]*the[\s*]*License.[\s*]*This[\s*]*program[\s*]*is[\s*]*distributed[\s*]*in[\s*]*the[\s*]*hope[\s*]*that[\s*]*it[\s*]*will[\s*]*be[\s*]*useful,[\s*]*but[\s*]*WITHOUT[\s*]*ANY[\s*]*WARRANTY;[\s*]*without[\s*]*even[\s*]*the[\s*]*implied[\s*]*warranty[\s*]*of[\s*]*MERCHANTABILITY[\s*]*or[\s*]*FITNESS[\s*]*FOR[\s*]*A[\s*]*PARTICULAR[\s*]*PURPOSE.[\s*]*See[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*for[\s*]*more[\s*]*details.\s(#* *\n)*|\1 SPDX-License-Identifier: GPL-2.0-only\n\n|' $(cat filelist) Change-Id: I1008a63b804f355a916221ac994701d7584f60ff Signed-off-by: Patrick Georgi <pgeorgi@google.com> Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41177 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-09AUTHORS, util/: Drop individual copyright noticesPatrick Georgi
We have the git history which is a more reliable librarian. Change-Id: Idbcc5ceeb33804204e56d62491cb58146f7c9f37 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41175 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: ron minnich <rminnich@gmail.com>
2020-03-09util/superiotool: Drop one SCH5317 entryAngel Pons
The SCH5317 can have either 0x85 or 0x8c as device ID. However, the former results in false positives on any ITE IT85xx series embedded controller, which has led some people to think that chip was actually in their laptops. Moreover, there is no register dump for the SCH5317. Since nobody has touched this in over a decade, avoid further confusion by dropping the misleading definition. Change-Id: I4d1d34d1b88b878461499e52f1a916ee1e33210d Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39376 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-01-30util/*: more typo fixesPatrick Georgi
Found by: util/lint/checkpatch.pl --types TYPO_SPELLING --fix-inplace --strict --terse -f $(find util -name '*.[ch]') Change-Id: I059071fd3a2edb41c72fc57fccbb520bd2ebb757 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38651 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-01-22superiotool: add IT8772F register dumpAngel Pons
Values as per "IT8772E Preliminary Specification V0.4 (For F Version)". Some values are unclear on this document, but is the only one I have. Change-Id: I6d74984f453c47d6ec71963a7dcab961a22a5964 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30224 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-12-26util/superiotool: alter Makefile to build the binary on FreeBSDIdwer Vollering
Change-Id: Ia96bee18abcdf278ae9178471cd4af2de454facf Signed-off-by: Idwer Vollering <vidwer@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37768 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-09-28superiotool: add basic support for SCH5545Alexander Couzens
Based on the SCH5627 datasheet which is similiar SCH5545 id 0xc4, SCH5627 id 0xc6. Change-Id: I81f3f68690d2000a4fa8a1e703c01f54ebbce953 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: https://review.coreboot.org/c/coreboot/+/20237 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-19util/superiotool: add IT8987 detection and register supportMatt Parnell
Signed-off-by: Matt Parnell <mparnell@gmail.com> Change-Id: I3674bc7035a28c4174a1bc1ee014c88e0ac96e8d Reviewed-on: https://review.coreboot.org/c/coreboot/+/34888 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-07-12util/superiotool/aspeed: fix SUART numberMaxim Polyakov
Change-Id: I20c4436d414bc6b9a3ff5138d6fd59ead8fd4a47 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34237 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-07-08util/superiotool: Add AST2400Patrick Rudolph
Add support for AST2400 Super I/O. The device doesn't have an ID register, so probe for scratch register not to read as 0xff. Tested on platform which has an AST2400. Change-Id: I86af69c6b2ccefe2c88eef875bc858239df834f1 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32984 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-07-01util/superiotool/nuvoton.c: Minor tag update/removalPavel Sayekat
Signed-off-by: Pavel Sayekat <pavelsayekat@gmail.com> Change-Id: Ic193f31b9776683849578bf9009c51bf22d1dae6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/33910 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-06-14util/superiotool/nuvoton.c: add NCT5539D register dumpPavel Sayekat
Values taken from NCT5539D datasheet V1.1 (June 30th, 2015). Tested on ASUS-H110M-E/M.2 mainboard (Kabylake i3-7100 CPU). Change-Id: Ib55068035ca574b22d0fea81e1a291f7cf0329d3 Signed-off-by: Pavel Sayekat <pavelsayekat@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33421 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-06-13util/superiotool: clarify usage of MISC and NANA definesFelix Held
Change-Id: I0b3c5c810bfb05eaec13511391ecd55d7b9eb4e8 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33402 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-03-06util/superiotool/ite.c: add support for IT8613EKrystian Hebel
Based on not publicly available IT8613E Preliminary Specification V0.3. Change-Id: Iec99d4d998f645dbad9c803d6d5477580b0bccc4 Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31620 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-01-25util/superiotool: detect Fintek F81866, F8196*Kyle Stevenson
F81866 detection tested with the iBASE SI-613: superiotool r4.9-420-g034e5e6 Found Fintek F81866 (vid=0x3419, id=0x1010) at 0x4e F8196* detection is based on chip IDs provided by iBASE, but untested. Change-Id: I7210e1523a188a8593cd03547bb0c95cd3e7aa39 Signed-off-by: Kyle Stevenson <kstevenson@comqi.com> Reviewed-on: https://review.coreboot.org/c/31052 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-15util/superiotool: Add ITE8528Patrick Rudolph
Add ITE8528 which can be found on the wedge100s. Most registers are dumped from hardware. No datasheet is publicy available. Change-Id: I24b12c0032157a4959336f8b51dadbe7b2e09d66 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/30801 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-01-04util/superiotool: Add ITE IT8786E-IKyösti Mälkki
Based on IT8786E-I V0.4.1 datasheet with following remark: "Please note that the IT8786E-I V0.4.1 is applicable only to the D version." Signed-off-by: Kyösti Mälkki <kyosti.malkki@3mdeb.com> Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Ibf6e290abb01ae1b6b28173a83e88d1d99663ad4 Reviewed-on: https://review.coreboot.org/c/30334 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-11-17treewide: use /usr/bin/env where appropriateYegor Timoshenko
Some Unix systems (GuixSD, NixOS) do not install programs like Bash and Python to /usr/bin, and /usr/bin/env has to be used to locate these instead. Change-Id: I7546bcb881c532adc984577ecb0ee2ec4f2efe00 Signed-off-by: Yegor Timoshenko <yegortimoshenko@riseup.net> Reviewed-on: https://review.coreboot.org/28953 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-10-10util/superiotool/smsc.c: Add SCH5504 register dumpAngel Pons
There is no datasheet available for this SuperIO, but dumping all possible registers on a Dell Optiplex GX520 resulted in data that was similar to other supported chips. Data also matches what is set in the BIOS, e.g. the parallel and serial ports' addresses. Change-Id: I768e4b5ec1e73c53e1a2355e0a0657b7a5ccbb89 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28958 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-10-08util/superiotool/smsc.c: Add some register dumpsAngel Pons
The SCH3112, SCH3116 and SCH5127 were lacking a pin dump. Since their datasheets are available, add their pin dumps. The SCH3112, SCH3114 and SCH3116 are almost identical, they only differ in the number of serial ports. Some values in the SCH3114 dump were inaccurate, that has been fixed as well. Datasheets used: - SCH311X: DS00001872A - SCH5127: DS00002081A Change-Id: Ic985526be9b09e0452eaf883904dfaf709b7e907 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-09-13util/superiotool: Add Winbond W83667HG register dumpAngel Pons
This SuperIO is supported by coreboot and used in two Asus boards. However, superiotool was lacking a register dump for this chip. Add the corresponding data from datasheet W83667HG-B revision 1.3 into superiotool. The SuperIO's datasheet was obtained by requesting it to Nuvoton. Change-Id: Ie51dc492c761d9c3d4b6100017bb730b1ae6d1e0 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-08-26util/superiotool: Fix typoElyes HAOUAS
Change-Id: I62fed1084efc3224c9563619d57fbdc5040ddbbc Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28292 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-08-26superiotool: fix wpcd376iStefan Tauner
According to the datasheet (rev. 1.6) there is no SP2 (apart from some typos) and the IR is actually implemented as SP3 in LDN 0x16. Additionally, there is LDN 0x15 to set up CIR-specific options of the IR serial port, which was missing as well. Change-Id: I34d90d8c44f11a4f62ccc4b836409cc443fb7952 Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: https://review.coreboot.org/27856 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-07-26util: Add description.md to each utilTom Hiller
Descriptions are taken from the files themselves or READMEs. Description followed by a space with the language in marked up as code. Change-Id: I5f91e85d1034736289aedf27de00df00db3ff19c Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/27563 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-06-04util/superiotool: Remove whitespace before tabElyes HAOUAS
Change-Id: Ie79cfb92cfb8b8f628aa4b12bba946b0479fc466 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26668 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-04-17Use git HTTP URLs without `/p` in itPaul Menzel
Change-Id: I9972b138c6dd2a289880c4ec8b3fe64fc3baa66b Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/25545 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-01-15util/superiotool: dump VT1211 registersLubomir Rintel
Change-Id: Id01b72a2194ebf3359a11c3ff382efaedf28f9e1 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/22255 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15util/superiotool: distinguish between VT82C686 and VT1211Lubomir Rintel
They both have a device id of 0x3c. The former is part of the PCI chip set accessible via port 0x3f0 while the latter is a standalone LPC chip accessible via 0x2e/0x4e depending on strapping. They're not register compatible: the VT82C686 only provides a FDC, LPT and part of UARTs. The VT82C686 documentation suggests it has revision 0x00 while the VT1211 datasheet indicates 0x01. Nevertheless, the VT1211 I happen to have hs a revision of 0x02. Thus the revision is probably not good enough to tell one from the another. Change-Id: Ic7529c84724c8d6b9eb75b863f1bceef5e4b52b5 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/22254 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15util/superiotool: recognize a VT1211 LPC superioLubomir Rintel
Change-Id: I2c24c347c3e044397944ca2abbceb36f83483daf Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/22253 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-14util/superiotool: add support for chip ITE IT8623EGergely Kiss
Due to the lack of a datasheet, defaults are shown as "not available (NA)" in the register dump. Change-Id: I6baaf5dd95453fb1265425f357ea16c710c006ba Signed-off-by: Gergely Kiss <mail.gery@gmail.com> Reviewed-on: https://review.coreboot.org/23084 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-06-28util/superiotool: Check for libpci before builingArthur Heymans
Check is adapted from inteltool's Makefile. Change-Id: Ife01ef20d9284cb0a68719757856f9a66a4de452 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19074 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-07Use www.coreboot.org over coreboot.orgPaul Menzel
<https://coreboot.org> is redirected to <https://www.coreboot.org>. ``` $ curl -I https://coreboot.org HTTP/1.1 301 Moved Permanently Server: nginx/1.8.1 Date: Mon, 05 Jun 2017 10:41:33 GMT Content-Type: text/html Content-Length: 184 Connection: keep-alive Location: https://www.coreboot.org/ ``` So use the command below to use the final location to save a redirect. ``` $ git grep -l https://coreboot.org \ | xargs sed -i 's,https://coreboot.org,https://www.coreboot.org,g' ``` Change-Id: I4176c20ef31399f0063b41e3a0029cca0c1b0ff3 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/20035 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-07Use more secure HTTPS URLs for coreboot sitesPaul Menzel
The coreboot sites support HTTPS, and requests over HTTP with SSL are also redirected. So use the more secure URLs, which also saves a request most of the times, as nothing needs to be redirected. Run the command below to replace all occurences. ``` $ git grep -l -E 'http://(www.|review.|)coreboot.org' | xargs sed -i 's,http://\(.*\)coreboot.org,https://\1coreboot.org,g' ``` Change-Id: If53f8b66f1ac72fb1a38fa392b26eade9963c369 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/20034 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-06superiotool: Add SMSC KBC1126Iru Cai
Device ID is read from HP Elitebook 2760p. Based on: - superio/smsc/kbc1100 (LDNs, keyboard, EC) - DSDT from OEM firmware (COM1 and mailbox) - Datasheet "KBC1122 Priliminary DS Rev. 0.8" Change-Id: Id172ae42411a6d42a4ae7c7f30f96aeda3e6c384 Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/18480 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-05-08superiotool: Add registers of LPC47N217Iru Cai
Change-Id: I460663593dc32f5b52c19c3f19fbc35b8252ed4d Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/19606 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-03-13util/superiotool: Add support for Fintek F71808ANicola Corna
Default values taken from the datasheet and from the dump of an uninitialized F71808A on a Sapphire Pure Platinum H61. Both the control registers and the HWM configuration registers are added. Change-Id: Ia6e2a7c13a5086d19ebdb426f2f975b43220a273 Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/18562 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-01-03superiotool: Add support for HWM registers on W83627EHGArthur Heymans
Based on datasheet: "W83627EHF/EF W83627EHG/EG WINBOND LPC I/O, Revision : 1.0" Change-Id: Ia2e5ab8bc454a34a89fe2cf06bfba55261109785 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17457 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-03superiotool: Add support for HWM registers on W83627DHGArthur Heymans
Based on datasheet: "W83627DHG WINBOND LPC I/O, Version: 1.4" Change-Id: Id20dff7539d926ef6f68265efbfc7420539d9bca Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17964 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-31superiotool: Add undocumented registers of ITE IT8783E/FNico Huber
Dumping and behavioral analysis have shown that there are more registers in the environment control of the IT8783E/F than documented in my data- sheet. This adds every register that wasn't 0x00/0xff by default. The default values are guesswork: those that looked like sensor readings became NANA, others are taken from dumps. Change-Id: I7e39700c9b98ed5be9f085bc8ffd848006310254 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/17005 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-10-31superiotool: Add register definitions for ITE IT8783E/FNico Huber
Values are taken from an unpublished datasheet. With the exception of the default value for register 0x55 in the environment controller space: Looks like this was just documented wrong. The dumped value of 0x50 also makes more sense. Change-Id: I2bd23d30b7158b2e05fcee7c6280df82570d1401 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/17004 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-10-31superiotool: Add an alternative dump formatNico Huber
Add new dump format to superiotool that prints each register on a separate line. This should be more suitable for diff'ing dumps of multiple superiotool runs. Change-Id: I226ee82b903bf77e760d3396d02fa50688adb9f2 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/17003 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-07-31superiotool: Add Nuvoton NCT6791DOmar Pakker
This adds support for the Nuvoton NCT6791D Super I/O chip to the superiotool. The implementation is based on the Datasheet supplied by Nuvoton: Datasheet Version: January 8th, 2016 Revision 1.11 Datasheet deviation: - Defaults for control registers 0x20 and 0x21 are invalid. Datasheet: 0xc562. Actual: 0xc803. Change-Id: I8ced9738cd41960cbab7b5ea38ff19192d210672 Signed-off-by: Omar Pakker <omarpakker+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/15252 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-26superiotool: Add support for chip NCT6102D / NCT6106DRoberto Muñoz Gómez
Add support for chip NCT6102D / NCT6106D in superiotool Change-Id: I689ff8e796f43a5aac144e9898df750407588b1f Signed-off-by: Roberto Muñoz Gómez <munoz.roberto@gmail.com> Reviewed-on: https://review.coreboot.org/14206 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
2016-04-16util/superiotool: Add initial support for Exar XR28V384.Derek Waldner
Datasheet https://www.exar.com/content/document.ashx?id=21368 Add support for Exar chip used on a custom board that was designed to connect to the Olive Hill Plus development platform. The register dump was verified on the Olive Hill Plus platform. Change-Id: Ibd3e13eefb706bd99b6e5b38634f6855b39848ab Signed-off-by: Derek Waldner <derek.waldner.os@gmail.com> Reviewed-on: https://review.coreboot.org/14367 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-30util/superiotool: Register fix for Fintek F81865F/F-IWilbert Duijvenvoorde
Datasheet: http://www.fintek.com.tw/files/productfiles/F81865_V028P.pdf There is a multi-function select register listed as 0x2a-1 and 0x2a-2. These are the original names in the datasheet, but superiotool will display register 0x29 and 0x28 and their values. This patch renames them both to 0x2a and shows both of the default values for them. They are both 0x00, so one of them could be dropped though. Change-Id: Iad91f9e4755d2d1a123e56ab0fa9257be7ea9978 Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: https://review.coreboot.org/5404 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-26superiotool: fix out-of-box NetBSD Makefile supportAndrey Korolyov
Add NetBSD-specific locations under pkg/ and missing linker flag for libpciutils. Change-Id: I812817a374aaba561b28d8a22f20d238c9dca32b Signed-off-by: Andrey Korolyov <andrey@xdel.ru> Reviewed-on: https://review.coreboot.org/12830 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-24util: Update makefiles for junit testingMartin Roth
- Have clean remove junit.xml files. - Remove junit.xml target from cbmem makefile - this is in the top level Makefile.inc now. - add distclean targets to makefiles. - Make sure all makefiles have .PHONY set up. - rm commands need -f or they will fail if the file they're trying to remove doesn't exist, causing the build to fail. Change-Id: I2f0635f2c0a9417e3377a90c8d67103323c4a72f Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: http://review.coreboot.org/12120 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-08Remove empty lines at end of fileElyes HAOUAS
Used command line to remove empty lines at end of file: find . -type f -exec sed -i -e :a -e '/^\n*$/{$d;N;};/\n$/ba' {} \; Change-Id: I816ac9666b6dbb7c7e47843672f0d5cc499766a3 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/10446 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-02superiotool: detect the NCT5572DFelix Held
Change-Id: I99717072679a51deecd6934ce7fb4aeb45135cd6 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/10386 Tested-by: build bot (Jenkins) Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
2015-05-21Remove address from GPLv2 headersPatrick Georgi
As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-12-19util/superiotool: change displayed name of chip id 0xc333 (nct6776)Felix Held
nct6776f and nct6776d are just two package variants containing the same die Change-Id: I4d319fa0e791e66ad04857dede2fdfc8e42dd45a Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/7806 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-12-19util/superiotool: fix default values for nct6776 (rev. c)Felix Held
change default values according to the datasheet in revision 1.2 Change-Id: Iec1d55dd7b906a7a41940f3f8e42413922883efd Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/7805 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-12-09utils: Remove references to tracker from manpagesMartin Roth
abuild, inteltool, and superiotool's manpages still referenced reporting bugs to tracker.coreboot.org. Remove that url and change the message to point to the coreboot mailing list instead. Change-Id: I7a85bc2b36ccdb7f3798a39a08345c1a02a67e65 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7712 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-03-27util/superiotool: Add initial support for Fintek F71869ED.Wilbert Duijvenvoorde
Datasheet: http://www.fintek.com.tw/files/productfiles/F71869_V1.1.pdf Practically the same as F71869AD, just another ID (0x1408). Tested on actual hardware, Jetway NC9C-550-LF. Update: Fixed F71869ED based on the proper datasheet: http://www.alldatasheet.com/datasheet-pdf/pdf/459075/FINTEK/F71869ED.html Change-Id: I5da858565ca16ba4d73b47b42fadd31dabbc290b Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: http://review.coreboot.org/5380 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-03-24util/superiotool: Register fix for Fintek F71869ADWilbert Duijvenvoorde
Fixed F71869AD based on the proper datasheet: http://www.alldatasheet.com/datasheet-pdf/pdf/459074/FINTEK/F71869AD.html Change-Id: If22341551c6a1a9bbae088801a6194f7b5b6bf4d Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: http://review.coreboot.org/5405 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-01-31utils: Install man pages as non-executable (chmod 644)Lubomir Rintel
This bothers rpmlint. Change-Id: I27d9cfac3ef6834ff87acc5a5ccbf332e59eeb1a Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: http://review.coreboot.org/5075 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-27util/superiotool: Add initial support for Fintek F71869AD.Edward O'Callaghan
Change-Id: Ia2ce8214d8b419d0ca0186e6f6b2241097b0847b Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/4802 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-06-04superiotool: Add dump facility for HWM of W83627DHG-PNico Huber
Change-Id: I9355996a8cf1b7cb91cc415ec04f5108a1cc42a5 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3358 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-04superiotool: Add dump facility for ITE IT8516 + I/O 0x20e/fNico Huber
Change-Id: Iaea08b7eb5aac9ff1e0756f1400a82641bb45b14 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3359 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-04-22superiotool: add CR dump for W83627UHG = NCT6627UDFrank Rysanek
This commit adds "register dump capability" to superiotool for a specific chip by Winbond/Nuvoton: the W83627UHG AKA NCT6627UD (same chip, different package). In other words, it fills in the "CR map" definitions in winbond.c, which so far have been void for this chip. - superiotool r4.0-3976-g190011e Found Winbond W83627UHG = NCT6627UD (id=0xa2, rev=0x32) at 0x2e Register dump: idx 02 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val ff a2 32 ff f0 44 00 00 ff 00 00 00 00 03 00 00 ff def 00 a2 NA ff f0 MM 00 MM RR 00 00 00 00 02 00 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 00 00 00 00 02 8e 00 ff 00 00 def 01 03 f0 06 02 8e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 00 03 78 0c 04 3f def 01 03 78 07 04 3f LDN 0x02 (UART A) idx 30 60 61 70 f0 val 01 03 f8 04 00 def 01 03 f8 04 00 LDN 0x03 (UART B) idx 30 60 61 70 f0 f1 val 01 02 f8 03 00 44 def 01 02 f8 03 00 00 LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 72 f0 val 01 00 60 00 64 01 0c 82 def 01 00 60 00 64 01 0c 83 LDN 0x06 (UART C) idx 30 60 61 70 f0 val 01 03 e8 05 80 def 01 03 e0 04 00 LDN 0x07 (GPIO 3, GPIO 4) idx 30 e0 e1 e2 e3 e4 e5 e6 e7 val 04 ff ff ff ff ff ff ff ff def 00 ff 00 00 00 ff 00 00 00 LDN 0x08 (WDTO#, PLED, GPIO 5,6 & GPIO Base Address) idx 30 60 61 e0 e1 e2 e3 e4 e5 e6 e7 f5 f6 f7 val 01 00 00 ff ff ff ff ff ff ff ff 02 00 00 def 02 00 00 ff 00 00 00 ff 1f 00 00 00 00 00 LDN 0x09 (GPIO 1, GPIO 2 and SUSLED) idx 30 e0 e1 e2 e3 e4 e5 e6 e7 f3 val 02 ff ff ff ff 00 ff 00 00 00 def 00 ff 00 00 00 ff 00 00 00 00 LDN 0x0a (ACPI) idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 f2 f3 f4 f6 f7 fe val 01 00 01 00 0a 00 00 00 0c 00 09 00 01 00 00 00 00 00 def 00 00 01 00 ff 08 00 00 1c 00 RR RR 3e 00 00 00 00 00 LDN 0x0b (Hardware monitor) idx 30 60 61 70 f0 f1 f2 val 01 02 48 00 81 ff 81 def 00 00 00 00 RR RR 00 LDN 0x0c (PECI, SST) idx e0 e1 e2 e3 e4 e5 e6 e7 e8 f1 f2 f3 fe ff val 00 48 48 48 48 00 00 00 00 4c 50 10 23 5a def 00 48 48 48 48 00 RR RR 00 48 50 10 23 5a LDN 0x0d (UART D) idx 30 60 61 70 f0 val 00 00 00 00 00 def 00 02 e0 03 00 LDN 0x0e (UART E) idx 30 60 61 70 f0 val 00 00 00 00 80 def 00 03 e8 04 00 LDN 0x0f (UART F) idx 30 60 61 70 f0 val 01 02 38 0a 00 def 00 02 e8 03 00 Change-Id: I834f8767b29f3148f353004edb22cfd7db5ddd56 Signed-off-by: Frank Rysanek <Frantisek.Rysanek@post.cz> Reviewed-on: http://review.coreboot.org/3027 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-04-04libpayload, superiotool: README: Prepend `coreboot/` to path of change ↵Paul Menzel
directory line Nico Huber spotted [1], that commit (4d6ab4e2) [1] updating superiotools’s `README` with the Git command line superiotool: Update README with Git repository URL and directory location missed, that after `git clone` one sitll has to change into the cloned directory. So prepend the path with `coreboot/` to fix that. The same error happened in the commit (e1ea5151) for libpayload [2] libpayload: Update README with Git repository URL and directory location and is fixed in this patch too. [1] http://review.coreboot.org/#/c/3019/ [2] http://review.coreboot.org/2228 Change-Id: Ib6e8b678af6276556a40ccfd52ae35ca7e674455 Reported-by: Nico Huber <nico.h@gmx.de> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3021 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.huber@secunet.com>
2013-04-04superiotool: Update README with Git repository URL and directory locationPaul Menzel
Change-Id: I36d980cea5ca9cc67262dba809441091757e1fb5 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3019 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2013-03-29superiotool: Allow to override Makefile variables `CC`, `INSTALL` and `PREFIX`Paul Menzel
This way for example a different compiler can easily be used. CC=clang make Change-Id: I50b83554fd4826d00d87e60a30eb1f6a88834397 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2935 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-17superiotool: Add support for the IT8728F Super I/OАндрей Павлов
$ superiotool -d superiotool r4.0-3712-gd549279 Found ITE IT8728F (id=0x8728, rev=0x1) at 0x2e Register dump: idx 02 07 20 21 22 23 24 2b 2e 2f val 00 0a 87 28 01 00 00 40 00 00 def NA NA 87 28 01 00 00 MM 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 val 00 03 f0 06 02 00 00 def 00 03 f0 06 02 00 00 LDN 0x01 (COM1) idx 30 60 61 70 f0 f1 val 01 03 f8 04 00 50 def 00 03 f8 04 00 50 LDN 0x02 (COM2) idx 30 60 61 70 f0 f1 val 00 02 f8 03 00 50 def 00 02 f8 03 00 50 LDN 0x03 (Parallel port) idx 30 60 61 62 63 70 74 f0 val 01 03 78 00 00 07 04 08 def 00 03 78 07 78 07 03 03 LDN 0x04 (Environment controller) idx 30 60 61 62 63 70 f0 f1 f2 f3 f4 f5 f6 f9 fa fb val 01 0a 30 0a 20 09 00 80 00 00 20 00 f0 48 00 00 def 00 02 90 02 30 09 00 00 00 00 00 MM MM MM MM MM LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 71 f0 val 01 00 60 00 64 01 02 08 def 01 00 60 00 64 01 02 48 LDN 0x06 (Mouse) idx 30 70 71 f0 val 01 0c 02 00 def 00 0c 02 00 LDN 0x07 (GPIO) idx 25 26 27 28 29 2a 2c 2d 60 61 62 63 64 65 70 71 72 73 74 b0 b1 b2 b3 b4 b8 b9 ba bb bc bd c0 c1 c2 c3 c4 c8 c9 ca cb cc cd ce cf e0 e1 e2 e3 e4 e9 f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb val 00 f3 10 00 00 00 80 00 00 00 0a 00 00 00 00 00 20 00 00 00 00 00 00 00 20 00 00 00 00 00 01 00 00 40 00 01 00 00 00 00 00 00 00 00 00 00 00 00 21 10 42 00 00 00 00 1c 00 00 00 00 00 def 00 f3 00 00 00 00 03 00 00 00 00 00 00 00 00 00 20 38 00 00 00 00 00 00 20 00 00 00 00 00 01 00 00 40 00 01 00 00 40 00 00 00 00 00 00 00 00 00 MM 00 00 00 00 00 00 00 00 00 00 00 00 LDN 0x0a (Consumer IR) idx 30 60 61 70 f0 val 00 03 10 0b 06 def 00 03 10 0b 06 Change-Id: Ifb45d28005d78b2a99d8552b59154d11bdf44f6f Signed-off-by: Андрей Павлов <7134956@gmail.com> Reviewed-on: http://review.coreboot.org/2775 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
In the file `COPYING` in the coreboot repository and upstream [1] just one space is used. The following command was used to convert all files. $ git grep -l 'MA 02' | xargs sed -i 's/MA 02/MA 02/' [1] http://www.gnu.org/licenses/gpl-2.0.txt Change-Id: Ic956dab2820a9e2ccb7841cab66966ba168f305f Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2490 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-10-03superiotool: Fix for FreeBSDAndriy Gapon
Makefile still used SVNDEF on FreeBSD. Change-Id: I45c7fbc66c33e82a2146ef7df87b63bc7edea4cd Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/1554 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-09-06superiotool: Add support for Fintek F81865F/F-I register dump.Stefan Tauner
Datasheet: http://www.fintek.com.tw/files/productfiles/F81865_V028P.pdf The code was done by Juha Tuomala <Juha.Tuomala@iki.fi> but he refused to sign it off, or commit it for review. I'll commit it anyway with my sign-off because it does not exceed threshold of originality for any copyright. Change-Id: Id86267f5add539b99229f20bbe339bfb5eb20f8b Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: http://review.coreboot.org/1496 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-07-12superiotool: Dump data registers for Nuvoton chipsGuenter Roeck
Add support to dump all data registers for Nuvoton chips (NCT6775F, NCT6776F, and NCT6779D). Register contents will be dumped if the -e option is provided on the command line. Change-Id: I2b425b48c1f28a10ff3c1ca1d7f21c501eff74ad Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-on: http://review.coreboot.org/1150 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-14 16:38:59 +0000