summaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Expand)Author
2021-02-01soc/amd/stoneyridge/acpi: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-02-01soc/intel/broadwell/pch/sata.c: Don't enable Bus MasterAngel Pons
2021-02-01soc/intel/*: Get rid of custom microcode cachingPatrick Rudolph
2021-02-01device/oprom/include/x86emu/fpu_regs.h: Fix lint errorFrans Hendriks
2021-02-01drivers/intel/fsp2_0: Use CBFS_MCACHE when coreboot tears down CARArthur Heymans
2021-02-01soc/intel/xeon_sp: Use native CAR teardownArthur Heymans
2021-02-01drivers/intel/fsp2_0: Use coreboot postcar with FSP-TArthur Heymans
2021-01-31soc/intel/*: drop incomplete and unneeded check for DMI SRLOCKMichael Niewöhner
2021-01-31soc/amd/common/block/aoac: expand acronym in Kconfig help textFelix Held
2021-01-31mb/emulation/qemu-q35: Use common MADTAngel Pons
2021-01-31mb/emulation/qemu-q35: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-31soc/amd/cezanne/Kconfig: select common PSP gen2 supportFelix Held
2021-01-31soc/amd/picasso/psp: move soc_get_mbox_address to common PSP gen2 codeFelix Held
2021-01-31soc/amd/stoneyridge/psp: fix check of MSR_PSP_ADDR contentsFelix Held
2021-01-31soc/amd/picasso/psp: fix check of MSR_PSP_ADDR contentsFelix Held
2021-01-31soc/amd/*/psp: move MSR_CU_CBBCFG to common and rename to MSR_PSP_ADDRFelix Held
2021-01-31soc/amd/stoneyridge/southbridge: move PSP BAR hide bit to its registerFelix Held
2021-01-31soc/amd/cezanne: add soc/cpu.h with CPUID define for Cezanne A0 steppingFelix Held
2021-01-30sb/intel/ibexpeak: Drop invalid ME finalisation functionAngel Pons
2021-01-30soc/intel/broadwell/pch: Drop some `config_of` usesAngel Pons
2021-01-30soc/intel/broadwell: Move `ramstage.c` to PCH scopeAngel Pons
2021-01-30soc/intel/broadwell: Make `broadwell_init_pre_device` staticAngel Pons
2021-01-30soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig optionsAngel Pons
2021-01-30device: Drop `mmconf_resource_init` functionAngel Pons
2021-01-30nb/intel/i945: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30nb/intel/gm45: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30nb/intel/x4x: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30nb/intel/pineview: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30nb/intel/ironlake: Use MMCONF_BUS_NUMBER everywhereAngel Pons
2021-01-30nb/intel/sandybridge: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30nb/intel/haswell: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30soc/intel/broadwell: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30soc/intel/broadwell: Use common SMBus codeAngel Pons
2021-01-30device/Kconfig: Introduce MMCONF_LENGTHAngel Pons
2021-01-30soc/intel/{baytrail,broadwell} Fix building with refcode blobsAngel Pons
2021-01-30sb/intel/bd82x6x: Clean up early_thermal.cAngel Pons
2021-01-30nb/intel/ironlake: Use RCBA macrosAngel Pons
2021-01-30mb/amd/majolica: Add an empty bootblock function to handle GPIOZheng Bao
2021-01-30mb/amd/majolica: Add an empty function of mainboard bootblockZheng Bao
2021-01-30drivers/intel/fsp2_0: factor out and improve UPD signature checkFelix Held
2021-01-30soc/amd,intel: Drop leftover GNVS includesKyösti Mälkki
2021-01-30soc/amd/stoneyridge/southbridge: replace southbridge prefix with fchFelix Held
2021-01-30soc/amd/cezanne: add use result of acpi_is_wakeup_s3() in FSP callsFelix Held
2021-01-30soc/amd/picasso/chip: add missing acpi/acpi.h includeFelix Held
2021-01-30soc/intel/common/block: Create PCIE related macrosSubrata Banik
2021-01-30soc/intel/alderlake: Remove pch.h from SoC directorySubrata Banik
2021-01-30mb/intel/adlrvp: Remove unnecessary whitespaceSubrata Banik
2021-01-30soc/amd/piasso/data_fabric: rename data_fabric_read_reg32Felix Held
2021-01-30soc/amd/picasso/data_fabric: factor out indirect address/index writeFelix Held
2021-01-29soc/amd/cezanne: add empty ramstage FCH supportFelix Held
2021-01-29soc/amd/picasso/fch: replace southbridge prefix with fchFelix Held
2021-01-29soc/amd/cezanne/chip: add FSP silicon init driver callFelix Held
2021-01-29soc/intel: Remove duplicate call to acpi_wake_source()Kyösti Mälkki
2021-01-29mb/emulation/qemu-q35: Consolidate host bridge definitionsAngel Pons
2021-01-29mb/emulation/qemu-q35: Rename headerAngel Pons
2021-01-29device/Kconfig: Declare MMCONF symbols' type onceAngel Pons
2021-01-29mb/purism/librem_bdw: Turn comments into codeAngel Pons
2021-01-29soc/intel: Drop CMEM from GNVSKyösti Mälkki
2021-01-29soc/intel/baytrail,broadwell: Use resume_from_stage_cache()Kyösti Mälkki
2021-01-29stage_cache: Add resume_from_stage_cache()Kyösti Mälkki
2021-01-29mb/emulation/qemu-q35: Rename PICF to PICM in ASLKyösti Mälkki
2021-01-29ACPI: Do minor improvements on GNVSKyösti Mälkki
2021-01-29drivers/intel/fsp1_1: Drop s3_resume parameter to load_vbt()Kyösti Mälkki
2021-01-29intel/fsp1_1: Declare fsp_load() as staticKyösti Mälkki
2021-01-29vc/google/chromeos/Kconfig: Remove unused NO_TPM_RESUMEFrans Hendriks
2021-01-29superio/nuvoton/common/Kconfig: Remove HWM configFrans Hendriks
2021-01-29soc/amd/picasso/Kconfig: order SOC_AMD_COMMON* selections alphabeticallyFelix Held
2021-01-28mb/google/butterfly: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-28mb/gizmosphere/gizmo2: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-28mb/gigabyte/ga-b75m-d3h: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-28mb/hp/pavilion_m6_1035dx: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-28mb/asrock/e350m1: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-28mb/hp/abm: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-28mb/asrock/imb-a180: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-28mb/amd/thatcher: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-28mb/amd/parmer: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-28mb/amd/padmelon: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-28soc/amd/cezanne/Kconfig: move selections in alphabetical orderFelix Held
2021-01-28soc/amd/picasso: allow USB_PD port setting overrideChris Wang
2021-01-28mb/biostar/a68n_5200: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-28mb/elmex/pcm205400: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-28treewide: Remove unused #includes of spi_winbond.hDaniel Gröber
2021-01-28cpu/intel/socket_LGA775: Align CAR DCACHE_RAM_BASE to SIZEArthur Heymans
2021-01-28mb/system76/oryp5: Fix up DSDTPatrick Georgi
2021-01-28soc/intel: Remove selection of ME_REGION_ALLOW_CPU_READ_ACCESSSridhar Siricilla
2021-01-28southbridge/intel: Define default value for ME_REGION_ALLOW_CPU_READ_ACCESSSridhar Siricilla
2021-01-28mb/emulation/qemu-q35: Solve lint-001 errorFrans Hendriks
2021-01-28xeon_sp/cpx: Update meminfo max_capacity_mib and number_of_devicesJohnny Lin
2021-01-28mb/google/dedede/var/galith: Add Wifi SAR for convertiblesFrankChu
2021-01-28mb/intel/adlrvp: Configure SATA DEVSLP as per latest schematicsSubrata Banik
2021-01-28mb/google/parrot: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-28soc/amd/common: Handle I2C resource only if base address is definedZheng Bao
2021-01-28mb/google/asurada: Improve boot time by raising little CPU frequencyYidi Lin
2021-01-28cpu/intel/microcode: Add caching layer in intel_microcode_findPatrick Rudolph
2021-01-28soc/mediatek/mt8192: Implement dram all channel calibrationHuayang Duan
2021-01-28soc/mediatek/mt8192: Add mt6315_romstage_initYidi Lin
2021-01-28soc/mediatek/mt8192: Add function to raise the CCI frequencyWeiyi Lu
2021-01-28mb/google/dedede/var/sasuke: Configure GPP_G7 as nativeSeunghwan Kim
2021-01-28bayhub bh720: Factor out common HS200 init codeAngel Pons
2021-01-28drivers/elog: Correct code styleFrans Hendriks