summaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Expand)Author
2016-01-18google/glados: Add VR config settingsrobbie zhang
2016-01-18intel/skylake: provide default VR configurationAaron Durbin
2016-01-18google/glados: Add pull-ups on LPC address lines and setup PCH_WP earlyDuncan Laurie
2016-01-18intel/skylake: Add devicetree setting for DDR frequency limit UPDDuncan Laurie
2016-01-18intel/skylake: Add elog event for THERMTRIPDuncan Laurie
2016-01-18google/chell: Minor updates from EVT and FSP 1.8.0Duncan Laurie
2016-01-18google/lars: Add VrConfig UPD parametersdavid
2016-01-18google/lars: Correct the output for crossystem wpsw_bootdavid
2016-01-18skylake boards: csme: add p2sb device and hecienabled devicetree variableArchana Patni
2016-01-18header files: Fix guard name comments to match guard namesMartin Roth
2016-01-18console/: add missing license headersDamien Roth
2016-01-18commonlib/: Add missing license headersMartin Roth
2016-01-18arch/riscv: Add missing license headersMartin Roth
2016-01-18arch/x86/Makefile.inc: Update symbol check macroMartin Roth
2016-01-18intel/kunimitsu: Power gate Kepler devicePravin Angolkar
2016-01-18intel/kunimitsu: Enable TPM PIRQRishavnath Satapathy
2016-01-18intel/kunimitsu: add nhlt supportNaresh G Solanki
2016-01-17intel/skylake: disable heci1 if psf is unlockedArchana Patni
2016-01-17intel/skylake: During RO mode after FSP reset CB lose original stateSubrata Banik
2016-01-17google/lars: Enable TPM PIRQdavid
2016-01-17google/lars: Enable 20K PU on LPC_LAD 0-3david
2016-01-17intel/sandybridge/raminit: fix ODT settingPatrick Rudolph
2016-01-17google/lars: Remove/Disable Wake on landavid
2016-01-16google/lars: add nhlt supportSubrata Banik
2016-01-16vendorcode/intel/.../skylake: Update FspUpdVpd.h to v1.8.1Martin Roth
2016-01-16intel/skylake: Fix uninitialized variable warningMartin Roth
2016-01-16mainboard: Drop abuild.disabled files for Skylake boardsStefan Reinauer
2016-01-16intel/kunimitsu: remove/disable Wake on lanRizwan Qureshi
2016-01-16google/lars: Add new configuration parametersdavid
2016-01-16google/lars: Disable SD 3.0 Controller [D30:F6]Subrata Banik
2016-01-16intel/skylake: Add kconfig option to skip Native SD ControllerSubrata Banik
2016-01-16intel/kunimitsu: Add VrConfig UPD parametersRizwan Qureshi
2016-01-16intel/skylake: Add VrConfig UPD parameters from corebootRizwan Qureshi
2016-01-16intel/skylake: Enable SkipMpInit tokenRizwan Qureshi
2016-01-15intel/skylake: Init variable so GCC knows it's setMartin Roth
2016-01-15sb/intel/i82801gx: Fix sata AHCI for desktop NM10/ICH7Damien Zammit
2016-01-15intel/kunimitsu: Add new configuration parametersRizwan Qureshi
2016-01-15intel/skylake: More UPD params are added for PCH policy in FSPRizwan Qureshi
2016-01-15intel/skylake: Update UPD parameters as per FSP 1.8.0Barnali Sarkar
2016-01-15intel/kunimitsu: Enable 20K PU on LPC_LAD 0-3pchandri
2016-01-15intel/skylake: Add GPIO ACPI Apis.Subrata Banik
2016-01-15google/lars: Set DPTF critical temperature to 99Cdavid
2016-01-15google/lars: Disable kepler devicedavid
2016-01-15google/lars: Add support for MAX98357A audio amplifierSubrata Banik
2016-01-15intel/kunimitsu: Correct the output for crossystem wpsw_bootArindam Roy
2016-01-15google/lars: Update the PL1 value as TDPdavid
2016-01-15google/chell: Fix the P/N number for samsung K4E6E304EE-EGCFWisley
2016-01-15intel/kunimitsu: Add support for MAX98357A audio amplifierRohit Ainapure
2016-01-15google/chell: add nhlt supportAaron Durbin
2016-01-15google/glados: add nhlt supportAaron Durbin
2016-01-15intel/skylake: add nhlt supportAaron Durbin
2016-01-15lib: NHLT ACPI table supportAaron Durbin
2016-01-15intel/kunimitsu: Update the PL1 value as TDPSumeet Pawnikar
2016-01-15google/lars: Disable eMMC HS400 capabilitydavid
2016-01-14arch/x86: add missing license headersMartin Roth
2016-01-14soc/braswell: Add CPUID for D0 steppingDivya Sasidharan
2016-01-14ec/: add missing license headersMartin Roth
2016-01-14acpi/: add missing license headerMartin Roth
2016-01-14arch/x86/include: add missing license headersMartin Roth
2016-01-14soc/braswell: Fix P-state tableSubrata Banik
2016-01-14intel/skylake/pcr.c: error out on invalid size in pcr read/writeMartin Roth
2016-01-14mb/lenovo/x200: Add panel power sequence valuesNico Huber
2016-01-14nb/intel/gm45: Backport configuration of panel power timingsNico Huber
2016-01-14nb/intel/gm45: Drop unnecessary panel power handlingNico Huber
2016-01-14mainboard/lenovo: reserve century byteAlexander Couzens
2016-01-13arch/arm64: add missing license headersMartin Roth
2016-01-13arch/arm: add missing license headersMartin Roth
2016-01-13tree: drop last paragraph of GPL copyright header from new filesMartin Roth
2016-01-13intel/skylake platforms: Add MAINBOARD_HAS_LPC_TPM in KconfigMartin Roth
2016-01-13intel/northbridge/sandy: raminit code cleanupPatrick Rudolph
2016-01-13[WIP] mb/roda/rk9: Enable CONFIG_HAVE_ACPI_RESUMENico Huber
2016-01-13northbridge/intel/x4x: clean up includesMartin Roth
2016-01-12amd/cimx/sb800/pci_devs.h: Update guard #define nameMartin Roth
2016-01-12intel/skylake: Remove check for Microcode loaded by MEMartin Roth
2016-01-12google/guado: initial upstream migrationMatt DeVillier
2016-01-12nb/intel/gm45: Convert gma.c to `if (IS_ENABLED(` styleNico Huber
2016-01-10fsp1_1: Remove #if protection in header - It's not neededMartin Roth
2016-01-10lenovo/x220: Enable USB 3 controllerMarian Tietz
2016-01-08vendorcode/amd/agesa/f15tn: Fix out of bounds read on on memory voltageMartin Roth
2016-01-08fsp_baytrail: Add additional PCI space above 4GBMartin Roth
2016-01-07intel/braswell: Disable IFD & ME by default so abuild can buildMartin Roth
2016-01-07mainboard: Drop abuild.disabled files for Braswell boardsStefan Reinauer
2016-01-07Correct some common spelling mistakesMartin Roth
2016-01-07src/vendorcode/amd: correct spelling of MTRRPaul Menzel
2016-01-07f14: Increase AP stack to 8k on 64bitStefan Reinauer
2016-01-07google/cyan, intel/strago Kconfig: Only ask to display SPD onceMartin Roth
2016-01-07intel/fsp1_1: Disable GOP support by defaultMartin Roth
2016-01-07mainboard/asus/kgpe-d16: Enable romstage microcode spinlocksTimothy Pearson
2016-01-07cpu/amd/microcode: Introduce CBFS access spinlock to avoid IOMMU failureTimothy Pearson
2016-01-06cpu/amd/fam10h-15h: Add tsc_freq_mhz() functionTimothy Pearson
2016-01-06Revert "x86: Align CBFS on top of ROM"Aaron Durbin
2016-01-06intel/braswell: Build in both C0 and 'other' vbiosMartin Roth
2016-01-06commonlib: Add function to hash contents of a CBFS region.Aaron Durbin
2016-01-06commonlib/cbfs: Add type ids for empty filesPatrick Georgi
2016-01-06commonlib: Prepare code to be included in cbfstool builds.Aaron Durbin
2016-01-06commonlib: Add common cbfs parsing logic to coreboot and cbfstool.Aaron Durbin
2016-01-06commonlib: Add function to compute relative offsets from two region_devices.Aaron Durbin
2016-01-04sb/amd/sr5650: Correctly locate CPU MMCONFIG resourceTimothy Pearson
2016-01-04Revert "AMD OemS3Save: refactor for Merlin Falcon"Kyösti Mälkki
2016-01-03sb/intel/bd82x6x: Add missing PCIIDs for variants .Vladimir Serbinenko
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-13 11:59:38 +0000