summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/ibexpeak/pch.h
AgeCommit message (Expand)Author
2020-07-24nb/intel/ironlake: Move southbridge code to ibexpeakAngel Pons
2020-07-20sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASEAngel Pons
2020-06-22device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki
2020-06-16sb/intel: Clean up some SMI enablesKyösti Mälkki
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-02acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh
2020-04-04src/southbridge: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-01-14sb/intel/common: Declare common smbus_base() and enable_smbus()Kyösti Mälkki
2020-01-09sb/intel/common: Add smbus_set_slave_addr()Kyösti Mälkki
2019-12-14sb/intel/*: Remove romcc guardsArthur Heymans
2019-10-30src/southbridge: change "unsigned" to "unsigned int"Martin Roth
2019-10-13nb/intel/nehalem: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-10-13sb/intel/ibexpeak: Move some early PCH init after console initArthur Heymans
2019-10-06nb/intel/nehalem: Move PCH init to sb/intel/ibexpeakArthur Heymans
2019-10-06nb/intel/nehalem: Move romstage boilerplate to a common locationArthur Heymans
2019-10-06sb/intel/ibexpeak: Implement USB current settingsArthur Heymans
2019-10-06sb/intel/ibexpeak: Implement PCH function disable in chip_opsArthur Heymans
2019-10-06sb/intel/ibexpeak: Add CIR initializationArthur Heymans
2019-10-01intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROLKyösti Mälkki
2019-09-19sb/intel/ibexpeak: Add define for PRSTS registerAngel Pons
2019-08-21southbridge/intel: Tidy up preprocessor and headersKyösti Mälkki
2019-07-08sb/intel/ibexpeak: Use common final SPI OPs setupArthur Heymans
2019-05-29sb/intel/*: Delete early_spiPatrick Rudolph
2019-05-27sb/intel/ibexpeak: Use common Intel SMM codeArthur Heymans
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-01-14sb/intel: Use common RCBA MACROsPeter Lemenkov
2019-01-06Kconfig: Unify power-after-failure optionsNico Huber
2018-12-03sb/intel/common: Create a common PCH finalise implementationTristan Corrick
2018-06-21sb/intel/common: Make RCBA manipulation MACROs commonArthur Heymans
2018-06-21Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"Arthur Heymans
2018-05-24src: Remove space after `defined`Elyes HAOUAS
2018-05-18sb/intel/ibexpeak: Get rid of device_tElyes HAOUAS
2018-02-27sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common locationArthur Heymans
2017-08-06sb/intel/*: Use common SMBus functionsArthur Heymans
2017-07-16southbridge/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2016-09-13southbridge/intel/ibexpeak: transition away from device_tAntonello Dettori
2016-07-15southbridge/intel/ibexpeak: use common Intel ACPI hardware definitionsAaron Durbin
2016-02-23southbridge/intel/ibexpeak: Use common gpio.cPatrick Rudolph
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-06-10model_2065x: Use common i945-ivy TSEG SMM init.Vladimir Serbinenko
2015-05-28Migrate 2065x to SMM_MODULESVladimir Serbinenko
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-28intel SMI handlers: Refactor GPI SMI/SCI routingKyösti Mälkki
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
2014-11-23sandy/ivy/nehalem: Remerge interrupt handlingVladimir Serbinenko
2014-01-23Ibexpeak: add missing thermal init.Vladimir Serbinenko
2013-11-25Support for Ibexpeak southbridgeVladimir Serbinenko
2013-06-13Revert "Add support for Intel Ibex Peak (Mobile 5) southbridge"Stefan Reinauer
2013-06-12Add support for Intel Ibex Peak (Mobile 5) southbridgeStefan Reinauer
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-13 08:45:45 +0000