coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-07-26	soc/nvidia/tegra124: Increase bootblock size	Arthur Heymans
2021-07-26	soc/intel/jasperlake: Set xHCI LFPS period sampling off time	Ben Kao
2021-07-26	soc/amd/common/block/pm: Add support for Modern Standby event logging	Karthikeyan Ramasubramanian
2021-07-26	soc/amd/common/block/acpi: Extract event logging helpers	Karthikeyan Ramasubramanian
2021-07-25	sc7280: Increased CBFS_MCACHE size	Ravi Kumar Bokka
2021-07-25	soc/amd/common/block/cpu/mca/mcax: add comment about McaXEnable bit	Felix Held
2021-07-24	soc/amd/*/chip.h: Correct PSPP Enum Value	Matt Papageorge
2021-07-24	soc/intel/common/block: Add space before comment delimiter	Subrata Banik
2021-07-24	soc/amd/common/block/cpu/mca/mca_common: remove additional newline	Felix Held
2021-07-23	soc/amd/stoneyridge/fch: change sb prefix of sb_clk_output_48Mhz to fch	Felix Held
2021-07-23	soc/amd/picasso/fch: change sb prefix of sb_clk_output_48Mhz to fch	Felix Held
2021-07-23	soc/amd/picasso/fch: make sb_clk_output_48Mhz static	Felix Held
2021-07-22	soc/qualcomm: move uart_bitbang UART w/gpio code to common	Ravi Kumar Bokka
2021-07-22	sc7180: Add target specific GPIO pin definitions	Taniya Das
2021-07-21	soc/amd/cezanne/mca: add and use mca_bank_name[]	Felix Held
2021-07-21	soc/amd/cezanne: enable crypto in psp_verstage	Kangheui Won
2021-07-21	commonlib/timestamp,amd/common/block/cpu: Add uCode timestamps	Raul E Rangel
2021-07-21	soc/qualcomm/sc7280: Replace gpio offset value with macro	Taniya Das
2021-07-21	sc7180: Renaming the GPIO macro in QSPI and I2C driver	Ravi Kumar Bokka
2021-07-21	soc/qualcomm/common/gpio: Define a macro for the gpio offset	Taniya Das
2021-07-21	soc/mediatek/mt8195: modify mt6360 interface	Rex-BC Chen
2021-07-21	soc/mediatek/mt8195: redefine mt6360_regulator_id	Rex-BC Chen
2021-07-20	soc/intel/alderlake: Add support for I2C6 and I2C7	Varshit B Pandya
2021-07-20	soc/amd/picasso/makefile: order source files alphabetically	Felix Held
2021-07-20	soc/amd/cezanne/makefile: order source files alphabetically	Felix Held
2021-07-19	soc/amd/{cezanne,picasso}: Escape PSP_VERSTAGE_FILE default	Raul E Rangel
2021-07-19	soc/amd/{common,cezanne}: Implement HAVE_PAYLOAD_PRELOAD_CACHE	Raul E Rangel
2021-07-19	soc/intel/common: Rename kconfig PMC_EPOC	Lean Sheng Tan
2021-07-18	soc/amd/cezanne: Start loading APOB asynchronously	Raul E Rangel
2021-07-18	soc/amd/common/apob: Add support for asynchronously reading APOB_NV	Raul E Rangel
2021-07-18	soc/amd/common/apob: Switch to using fmap_locate_area_as_rdev	Raul E Rangel
2021-07-18	soc/amd/common/block/lpc/spi_dma: Yield after completing transaction	Raul E Rangel
2021-07-18	soc/amd/common/block/lpc/spi_dma: Use mutex to protect DMA registers	Raul E Rangel
2021-07-18	soc/amd/common/block/lpc/spi_dma: Implement SPI DMA functionality	Raul E Rangel
2021-07-17	soc/amd/common/block/graphics: add GPU PCI ID for Barcelo	Felix Held
2021-07-17	soc/amd/cezanne/graphics: add VBIOS ID remapping for Barcelo	Felix Held
2021-07-17	soc/intel/alderlake: Select INTEL_GMA_OPREGION_2_1	Meera Ravindranath
2021-07-17	soc/intel/elkhartlake: Expose FIVR config to mainboard	Lean Sheng Tan
2021-07-17	soc/intel/common/block: Drop unused `intelblocks/mp_init.h` include	Subrata Banik
2021-07-17	soc/intel/cannonlake: Make use of `cpu/intel/cpu_ids.h'	Subrata Banik
2021-07-17	soc/intel/elkhartlake: Make use of `cpu/intel/cpu_ids.h'	Subrata Banik
2021-07-17	soc/intel/jasperlake: Make use of `cpu/intel/cpu_ids.h'	Subrata Banik
2021-07-17	soc/intel/apollolake: Make use of `cpu/intel/cpu_ids.h'	Subrata Banik
2021-07-17	soc/intel/icelake: Make use of `cpu/intel/cpu_ids.h'	Subrata Banik
2021-07-17	soc/intel/skylake: Make use of `cpu/intel/cpu_ids.h'	Subrata Banik
2021-07-17	soc/intel/tigerlake: Make use of `cpu/intel/cpu_ids.h'	Subrata Banik
2021-07-17	soc/intel/alderlake: Make use of `cpu/intel/cpu_ids.h'	Subrata Banik
2021-07-17	cpu/intel: Add dedicated file to grow Intel CPUIDs	Subrata Banik
2021-07-17	soc/intel/xeon_sp/cpx: Align Cooper Lake CPUID as per EDS	Subrata Banik
2021-07-16	include/cpu/amd/msr: don't redefine the IA32_BIOS_SIGN_ID MSR	Felix Held
2021-07-15	soc/amd/cezanne: add ACPI CPPC support for AMD	Julian Schroeder
2021-07-15	soc/amd/common/block/cpu/mca/mcax: print all MCAX registers	Felix Held
2021-07-15	soc/amd/common/block/cpu/mca: make building the BERT support conditional	Felix Held
2021-07-15	soc/amd/common/block/cpu/mca: commonize mca_check_all_banks	Felix Held
2021-07-15	soc/amd/common/block/cpu/mca/mca: factor out mca_skip_check	Felix Held
2021-07-15	soc/amd/stoneyridge/mca: implement and use mca_has_expected_bank_count	Felix Held
2021-07-15	soc/amd/common/block/cpu/mca: move function prototypes to local header	Felix Held
2021-07-15	soc/amd/*/mca: factor out common MCA/MCAX check & print functionality	Felix Held
2021-07-15	soc/amd/picasso/mca: factor out mca_has_expected_bank_count	Felix Held
2021-07-15	soc/amd/common/blocks/cpu/mca: factor out common BERT helper functions	Felix Held
2021-07-15	soc/amd/*/mca: factor out BERT entry generation to soc/amd/common	Felix Held
2021-07-15	soc/intel/alderlake: Add virtual GPIOs for community 1	Maulik V Vaghela
2021-07-15	soc/intel/tigerlake: Use `is_devfn_enabled()` for Crashlog UPDs	Subrata Banik
2021-07-15	soc/intel/alderlake: Use `is_devfn_enabled()` for Crashlog UPDs	Subrata Banik
2021-07-14	soc/amd/picasso/mca: add missing types.h include	Felix Held
2021-07-14	soc/amd: factor out check_mca to common code	Felix Held
2021-07-14	soc/amd/cezanne/mca: add empty mca_check_all_banks function	Felix Held
2021-07-14	soc/amd: move check_mca prototype to soc/amd/common/blocks/include	Felix Held
2021-07-14	soc/amd/stoneyridge: add and use mca_is_valid_bank & mca_get_bank_name	Felix Held
2021-07-14	soc/amd/picasso: implement and use mca_get_bank_name	Felix Held
2021-07-14	soc/amd/picasso: implement and use mca_is_valid_bank	Felix Held
2021-07-14	soc/amd/picasso: check length of mca_bank_name array	Felix Held
2021-07-14	soc/amd/picasso: add missing banks to mca_bank_name array	Felix Held
2021-07-14	soc/amd/stoneyridge: use index for mca_bank_name initialization	Felix Held
2021-07-14	soc/amd/stoneyridge/mca: add missing types.h include	Felix Held
2021-07-14	soc/amd/common/block/lpc: Don't disable the HOG bit	Raul E Rangel
2021-07-14	soc/amd/cezanne: Move APOB update into ramstage	Raul E Rangel
2021-07-14	soc/amd/common/block/apob: Fix incorrect printf format	Raul E Rangel
2021-07-14	soc/amd/cezanne: add basic MCA support	Felix Held
2021-07-14	include/cpu/amd/msr: add and use MC_CTL_MASK macro	Felix Held
2021-07-14	include/cpu/x86/msr: move MC0_CTL_MASK to include/cpu/amd/msr	Felix Held
2021-07-14	soc/amd/picasso/mca: use mca_clear_status()	Felix Held
2021-07-14	src: use mca_clear_status function instead of open coding	Felix Held
2021-07-14	soc/mediatek/mt8195: Get DRAM size from DRAM calibration result	Ryan Chuang
2021-07-14	soc/intel/alderlake: Add GFx Device ID 0x46a6	Maulik V Vaghela
2021-07-14	soc/intel/common: Use SPR for backing up data way and eviction mask	Subrata Banik
2021-07-14	soc/intel/skylake: Drop dead `ScanExtGfxForLegacyOpRom`	Angel Pons
2021-07-14	soc/intel/skylake: Rename `Rmt` devicetree setting	Angel Pons
2021-07-14	soc/intel/common/block/cpu/cpulib: use mca_get_bank_count()	Felix Held
2021-07-14	include/cpu/x86/msr: introduce IA32_MC_*(x) macros	Felix Held
2021-07-14	soc/amd/stoneyridge/mca: refactor warm boot check in mca_check_all_banks	Felix Held
2021-07-14	soc/amd/picasso,stoneyridge/mca: factor out mca_check_all_banks	Felix Held
2021-07-14	soc/amd/picasso,stoneyridge/mca: factor out mca_clear_errors	Felix Held
2021-07-14	soc/amd/picasso,stoneyridge/mca: factor out mca_print_error()	Felix Held
2021-07-14	soc/amd/picasso,stoneyridge/mca: use unsigned int for MCA bank number	Felix Held
2021-07-14	soc/amd/picasso,stoneyridge/mca: clean up mca_bank struct	Felix Held
2021-07-14	soc/amd/picasso,stoneyridge/mca: mark num_banks as constant	Felix Held
2021-07-14	include/cpu/x86/msr: add IA32_ prefix to MC0_ADDR and MC0_MISC	Felix Held
2021-07-14	src: Use initial_lapicid() instead of open coding it	Arthur Heymans
2021-07-13	soc/intel/alderlake: Implement WA for DDR5 DIMM modules	Meera Ravindranath