summaryrefslogtreecommitdiff
path: root/src/soc/ti/am335x/Makefile.inc
AgeCommit message (Collapse)Author
2022-10-31soc: Add SPDX license headers to MakefilesMartin Roth
Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Ic875708697f07b6dae09d27dbd67eb8b960749f0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68984 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2021-03-30soc/ti/am335x: Add SDRAM initialization driverSam Lewis
Adds code taken and (barely) adapted from U-Boot (release 2020.04, commit 36fec02b1f90b92cf51ec531564f9284eae27ab4) for SDRAM initialization. This should in theory work for other configurations than the Beaglebone Black's DRAM configuration, but hasn't been tested. Change-Id: Ib1bc2fa606f7010c8c789aa7a5c37cd41bc484b9 Signed-off-by: Sam Lewis <sam.vr.lewis@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44386 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-30mb/ti/beaglebone: Load romstage/ramstage from SDSam Lewis
Adds a "sd_media" boot_device to allow booting from the SD card. This assumes that the generated "MLO" file is placed at a 128KB offset from the start of the SD card, to allow for the MBR etc. to be at the start of the SD card. Placing the MLO file here allows the AM335x boot ROM to load and execute the bootblock stage as well, as 128KB is one of the offsets the boot ROM checks when looking for the next stage to execute. As part of this, a FMD for the Beaglebone has also been defined. It's sized at 32M somewhat arbitrarily, as SD cards could allow for much bigger payloads. TEST: Beaglebone boots from bootblock into romstage. Romstage to ramstage still doesn't work as it needs RAM initialization first. Change-Id: I5f6901217fb974808e84aeb679af2f47eeae30fd Signed-off-by: Sam Lewis <sam.vr.lewis@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44385 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-22soc/ti/am335x: Fix timer implementationSam Lewis
Implements the monotonic timer using the am335x dmtimer peripheral. Change-Id: I4736b6d3b6e26370be9e8f369fc02285ad519223 Signed-off-by: Sam Lewis <sam.vr.lewis@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44383 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-09soc/ti/am335x: Fix MLO buildSam Lewis
Allows the AM335X to boot from the coreboot generated MLO by: - Fixing the load address in the MLO header to be the start of SRAM - Fixing the way that the bootblock size is calculated (which is embedded into the MLO so that the MLO knows how much to load into SRAM). The previous method relied on parsing cbfstool output - the output has changed format since this was originally written so this no longer works. Directly using the filesize of the built binary is probably a more stable way of doing this. As part of this, the start addresses of SRAM and DRAM were fixed to be consistent with the AM335x Technical Reference Manual (spruh73, rev Q). TEST: Booted Beaglebone Black from MLO placed at offset 0x00 on an SD card Change-Id: I514d7cda65ddcbf27e78286dc6857c9e81ce6f9e Signed-off-by: Sam Lewis <sam.vr.lewis@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44381 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-19cpu/ti/am335x: Move from cpu to soc in treeSam Lewis
The AM335X is a SoC, so should be in the soc tree. This moves all the existing am335x code to soc/ and updates any references. It also adds a soc.c file as required for the ramstage. Change-Id: Ic1ccb0e9b9c24a8b211b723b5f4cc26cdd0eaaab Signed-off-by: Sam Lewis <sam.vr.lewis@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44378 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>