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path: root/src/soc/nvidia/tegra132
AgeCommit message (Expand)Author
2015-03-26tegra132: use pointers in funitcfgAaron Durbin
2015-03-26tegra132: add i2c2 controller to funit libraryAaron Durbin
2015-03-26tegra132: fix carveout address calculation >= 4GiBAaron Durbin
2015-03-26t132: Implement clock initialization api for functional unitsFurquan Shaikh
2015-03-26tegra132: move common bootblock init into SoC codeAaron Durbin
2015-03-25tegra132: enable pinmux input for PAD_CFG_GPIO_INPUT()Aaron Durbin
2015-03-25tegra132: select HAVE_MONOTONIC_TIMERAaron Durbin
2015-03-25tegra132: use pre-existing reset APIAaron Durbin
2015-03-25tegra132: fix gpio constantsAaron Durbin
2015-03-25tegra132: output chip information and MTS versionAaron Durbin
2015-03-25tegra132: introduce romstage_mainboard_init()Aaron Durbin
2015-03-25ryu: Add mainboard_init_xxx functions to get it building againTom Warren
2015-03-24tegra132: add bootblock_mainboard_early_init()Aaron Durbin
2015-03-24tegra132: use padconfig for initializing uart padsAaron Durbin
2015-03-24tegra132: provide pad configuration interfaceAaron Durbin
2015-03-23t132: Change romstage base addressFurquan Shaikh
2015-03-23t132: Add support for tpm i2cFurquan Shaikh
2015-03-21tegra132: convert to stopwatch APIAaron Durbin
2015-03-21tegra132: fill out udelay() implementationAaron Durbin
2015-03-20bootblocks: use run_romstage()Aaron Durbin
2015-03-17t132: Add TTB_BUFFER to resource reservedFurquan Shaikh
2015-03-17Tegra132: Configure CPU clockJimmy Zhang
2015-03-17t132: Add monotonic_timer.c to rmodules_armFurquan Shaikh
2015-03-13coreboot t132: Remove empty function cpu0_config_and_resetFurquan Shaikh
2015-03-13coreboot t132: Stop running AVP at the end of romstageFurquan Shaikh
2015-03-13tegra132: fix Rx FIFO underruns with slower SPI clockAaron Durbin
2015-03-13tegra132: Add Trust Zone register accessAaron Durbin
2015-03-13t132: Add mmu supportFurquan Shaikh
2015-03-13tegra132: Add code to setup chip operations and mem resources.Tom Warren
2015-03-13ryu: Add support for full LPDDR3 SDRAM BCT init via BootROMTom Warren
2015-03-13tegra132: split memory range querying to above/below 4GiBAaron Durbin
2015-03-12t132: handle optional Trust Zone region correctlyAaron Durbin
2015-03-07t132: add Kconfig option for MTS microcode directoryAaron Durbin
2015-03-07tegra132: add preboot MTS to bct generationAaron Durbin
2015-03-05tegra132: add support for TZ carve-outAaron Durbin
2015-03-05t132: handle carve-outs for addressable memoryAaron Durbin
2015-03-05t132: Enable cbmem console supportAaron Durbin
2015-03-05t132: bring up 64-bit denver coreAaron Durbin
2015-03-04coreboot t132: Stack init re-workFurquan Shaikh
2015-03-04t132: kick off core complex after loading MTS microcodeAaron Durbin
2015-03-04t132: load MTS microcodeAaron Durbin
2015-03-04t132: Replace fallback with CONFIG_CBFS_PREFIXMarc Jones
2015-03-04t132: Add shared romstageAaron Durbin
2015-03-04coreboot rush: Add dram init codeFurquan Shaikh
2015-03-04coreboot rush: Add support for basic romstageFurquan Shaikh
2015-03-04coreboot t132: Enable loading of romstage from CBFS mediaFurquan Shaikh
2015-03-04coreboot t132: Remove init pllx for nowFurquan Shaikh
2015-03-04coreboot t132,rush: Add mainboard specific bootblock_initFurquan Shaikh
2015-03-03coreboot t132: Add clock.c to all three stages of corebootFurquan Shaikh
2015-03-02coreboot arm: Define function for setting cntfrq registerFurquan Shaikh
2015-03-02tegra132: Enable bootblock support in tegra132 including UART supportFurquan Shaikh
2015-02-17tegra132: Postprocess bootblock properlyPatrick Georgi
2015-02-17tegra132: Add BCT support in tegra132 socFurquan Shaikh
2015-02-13tegra132: Fix build for verstageMarc Jones
2015-01-26tegra132: Add support for tegra132 socFurquan Shaikh
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