Age | Commit message (Expand) | Author |
2021-11-25 | commonlib/cbmem_id.h: Fix typo in macro name | Angel Pons |
2021-11-25 | soc/intel/adl: Modify SOC_INTEL_ALDERLAKE_DEBUG_CONSENT default value | Kane Chen |
2021-11-25 | soc/intel/elkhartlake: Update SA DIDs Table | Rick Lee |
2021-11-25 | soc/intel/graphics/Kconfig: Guard options | Arthur Heymans |
2021-11-25 | soc/intel/common/thermal: Refactor thermal block to improve reusability | Subrata Banik |
2021-11-24 | soc/intel/elkhartlake: Disable Intel PSE by default | Lean Sheng Tan |
2021-11-23 | soc/intel/alderlake: remove tmp bar assignment for cpu crashlog | Kane Chen |
2021-11-22 | soc/intel/cannonlake: Fix PEG1 _PRT generation | Arthur Heymans |
2021-11-22 | soc/intel: Allow enable/disable ME via CMOS | Sean Rhodes |
2021-11-22 | soc/intel/{adl,ehl,jsl,tgl}: Remove unused header `thermal.h` | Subrata Banik |
2021-11-20 | soc/intel/alderlake: Hook up common code for thermal configuration | Subrata Banik |
2021-11-20 | soc/intel/alderlake: Set `pch_thermal_trip` for Dynamic Thermal Shutdown | Subrata Banik |
2021-11-20 | soc/intel/common/thermal: Allow thermal configuration over PMC | Subrata Banik |
2021-11-20 | soc/intel/common/thermal: Use `clrsetbits32()` for setting LTT | Subrata Banik |
2021-11-20 | soc/intel/common/thermal: Hook up IA thermal block to romstage | Subrata Banik |
2021-11-20 | soc/intel/common/thermal: Drop unused parameter of pch_get_ltt_value() | Subrata Banik |
2021-11-19 | soc/intel/alderlake: Update the VccIn Aux Imon IccMax for ADL-M | Bora Guvendik |
2021-11-18 | drivers/fsp: Rewrite post code hex values in lowercase | Sean Rhodes |
2021-11-18 | soc/intel/alderlake: Add Acoustic noise mitigation UPDs | Wisley Chen |
2021-11-17 | Revert "soc/intel/adl: Drop SGPM, RGPM and EGPM methods" | Maulik V Vaghela |
2021-11-17 | soc/intel/../thermal: Fix return type of `pch_get_ltt_value()` | Subrata Banik |
2021-11-16 | soc/intel/../thermal: Drop `ltt_value` local variable | Subrata Banik |
2021-11-15 | soc/intel/alderlake: Fix build failure with enabled CSE stitching | Bernardo Perez Priego |
2021-11-15 | Reland "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main" | Hsuan-ting Chen |
2021-11-15 | soc/intel/alderlake: Disable VT-d for early silicons | Meera Ravindranath |
2021-11-15 | soc/intel/tigerlake: Add config option for S3 ACPI | Sean Rhodes |
2021-11-15 | soc/intel/tigerlake/apci: Only use SCM for ChromeOS | Sean Rhodes |
2021-11-13 | soc/intel/xeon_sp: Fix size_t type mismatch in print statement | Paul Menzel |
2021-11-12 | soc/intel/common/block/pcie: Add ADL-P CPU PCIe Device IDs | Tracy Wu |
2021-11-11 | lynxpoint/broadwell: Use `azalia_codecs_init()` | Angel Pons |
2021-11-11 | haswell/lynxpoint/broadwell: Use `azalia_codec_init()` | Angel Pons |
2021-11-11 | lynxpoint/broadwell: Use `azalia_program_verb_table()` | Angel Pons |
2021-11-11 | soc/intel: move SGX ACPI code to block/acpi | Michael Niewöhner |
2021-11-11 | Spell Intel Cooper Lake-SP with a space | Paul Menzel |
2021-11-11 | arch/x86: Refactor the SMBIOS type 17 write function | Subrata Banik |
2021-11-10 | Rename ECAM-specific MMCONF Kconfigs | Shelley Chen |
2021-11-09 | soc/intel/alderlake: Enable Intel FIVR RFI settings | Wisley Chen |
2021-11-09 | soc/intel: generate SSDT instead of using GNVS for SGX | Michael Niewöhner |
2021-11-09 | pci_mmio_cfg: Always use pci_s_* functions | Nico Huber |
2021-11-09 | ChromeOS: Fix <vc/google/chromeos/chromeos.h> | Kyösti Mälkki |
2021-11-08 | soc/intel: drop Kconfig `PM_ACPI_TIMER_OPTIONAL` | Michael Niewöhner |
2021-11-05 | soc/intel/denverton_ns: Refactor `detect_num_cpus_via_cpuid()` | Angel Pons |
2021-11-05 | soc/intel/xeon_sp: Refactor `get_threads_per_package()` | Angel Pons |
2021-11-05 | soc/intel/braswell: Make `num_cpus` unsigned | Angel Pons |
2021-11-05 | soc/intel/baytrail: Make `num_cpus` unsigned | Angel Pons |
2021-11-04 | soc/intel: Replace bad uses of `find_resource` | Angel Pons |
2021-11-03 | cpu/x86/Kconfig: Remove unused CPU_ADDR_BITS | Arthur Heymans |
2021-11-03 | soc/intel/xeon_sp: disable PM ACPI timer if chosen | Michael Niewöhner |
2021-11-03 | soc/intel/alderlake: Allow devicetree override to leave some VR settings as d... | Bora Guvendik |
2021-11-02 | soc/intel/denverton_ns: Fetch addr bits at runtime | Arthur Heymans |
2021-11-02 | lib: Add new argument as `ddr_type` to smbios_bus_width_to_spd_width() | Subrata Banik |
2021-11-01 | soc/intel: Don't send CSE EOP if CSME is disabled | Sean Rhodes |
2021-11-01 | soc/intel/braswell: Set GNVS DPTE via devicetree | Angel Pons |
2021-11-01 | soc/intel/braswell/chip.h: Use `bool` type | Angel Pons |
2021-11-01 | soc/intel/common/block/cse: Add get_me_fw_version function | Johnny Lin |
2021-10-30 | lib: Use `smbios_bus_width_to_spd_width` for setting dimm.bus_width | Subrata Banik |
2021-10-29 | soc/intel/alderlake: Add ACPI addition for USB4/TBT latency optimization | John Zhao |
2021-10-29 | soc/intel/apollolake: Fix BUG-message when checking for XDCI device | Werner Zeh |
2021-10-29 | soc/intel/icelake: select SOC_INTEL_COMMON_BLOCK_ACPI_GPIO | Arthur Heymans |
2021-10-27 | soc/intel/common/acpi: Correct IPC sub command for reading LPM requirement | Ethan Tsao |
2021-10-26 | cpu/x86/Kconfig.debug_cpu: drop HAVE_DISPLAY_MTRRS option | Felix Held |
2021-10-26 | soc/intel/quark/Kconfig: don't unselect CPU_X86_LAPIC | Felix Held |
2021-10-26 | soc/intel/alderlake: set lock offset for gpio pad communities | Nick Vaccaro |
2021-10-26 | soc/intel: Update api name for getting spi destination id | Wonkyu Kim |
2021-10-26 | cpu/x86: Introduce and use `CPU_X86_LAPIC` | Felix Held |
2021-10-26 | soc/*/Makefile: don't add cpu/x86/cache | Felix Held |
2021-10-26 | soc/intel/common: Add HECI Reset flow in the CSE driver | Sridhar Siricilla |
2021-10-26 | soc/intel/adl: Skip sending MBP HOB to save boot time | MAULIK V VAGHELA |
2021-10-25 | cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs | Felix Held |
2021-10-25 | soc/intel/common: Skip CSE post hook when CSE is disabled | Subrata Banik |
2021-10-22 | soc/intel/denverton_ns: use mp_cpu_bus_init | Felix Held |
2021-10-22 | soc/intel/elkhartlake: Add PSE PCI devices into header file | Lean Sheng Tan |
2021-10-22 | arch/x86/ioapic: Select IOAPIC with SMP | Kyösti Mälkki |
2021-10-22 | sb,soc/intel: Replace set_ioapic_id() with setup_ioapic() | Kyösti Mälkki |
2021-10-22 | sb,soc/intel: Set IOAPIC max entries before APIC ID | Kyösti Mälkki |
2021-10-22 | sb,soc/intel: Set IOAPIC redirection entry count | Kyösti Mälkki |
2021-10-22 | soc/intel/braswell: use mp_cpu_bus_init | Felix Held |
2021-10-22 | soc/intel/baytrail: use mp_cpu_bus_init | Felix Held |
2021-10-22 | cpu/x86/mp_init: move printing of failure message into mp_init_with_smm | Felix Held |
2021-10-22 | cpu/x86/mp_init: use cb_err as status return type in remaining functions | Felix Held |
2021-10-21 | soc/intel/skylake/cpu: rework failure handling in post_mp_init | Felix Held |
2021-10-21 | cpu/x86/mp_init: use cb_err as mp_init_with_smm return type | Felix Held |
2021-10-20 | soc/intel/alderlake: Fix wrong FIVR configs assignment | Bora Guvendik |
2021-10-20 | soc/intel/{skl,apl}: don't run or even include SGX code if disabled | Michael Niewöhner |
2021-10-19 | soc/intel/skl: Constify `soc_get_cstate_map()` | Patrick Georgi |
2021-10-19 | soc/intel/common/block/cse: Use newly added `create-cse-region` | Furquan Shaikh |
2021-10-19 | soc/intel/common/cse: Support RW update when stitching CSE binary | Furquan Shaikh |
2021-10-19 | soc/intel/alderlake: Enable support for CSE stitching | Furquan Shaikh |
2021-10-19 | soc/intel/common/cse: Add support for stitching CSE components | Furquan Shaikh |
2021-10-19 | soc/intel: Constify `soc_get_cstate_map()` | Angel Pons |
2021-10-19 | acpi/acpigen: Constify CST functions' pointers | Angel Pons |
2021-10-19 | soc/intel/*/acpi.c: Don't copy structs with `memcpy()` | Angel Pons |
2021-10-18 | ACPI: Have common acpi_fill_mcfg() | Kyösti Mälkki |
2021-10-18 | intel/tigerlake: Add missing IRQ for CNVi | Sean Rhodes |
2021-10-18 | soc/skylake: Make VT-d controllable from CMOS option | Sean Rhodes |
2021-10-17 | soc/intel/skylake: switch to common ACPI code | Michael Niewöhner |
2021-10-17 | soc/intel/{common,apl,glk}: guard PM Timer option on SoCs w/o PM Timer | Michael Niewöhner |
2021-10-17 | soc/intel/*: only enable PM Timer emulation if the PM Timer is disabled | Michael Niewöhner |
2021-10-17 | soc/intel: transition full control over PM Timer from FSP to coreboot | Michael Niewöhner |
2021-10-17 | soc/intel/{skl,cnl,dnv}: disable PM ACPI timer if chosen | Michael Niewöhner |