coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2017-08-26	soc/intel/skylake: Move SPI lock down config after resource allocation	Barnali Sarkar
2017-08-26	soc/intel/skylake: Move DMI lock down config after resource allocation	Subrata Banik
2017-08-25	soc/intel/skylake: Remove TCO lock down programming	Subrata Banik
2017-08-25	soc/intel/skylake: Move PMC lock down config after resource allocation	Subrata Banik
2017-08-25	soc/intel/skylake: Remove ABASE lock down programming	Subrata Banik
2017-08-25	soc/intel/skylake: Move LPC lock down config after resource allocation	Subrata Banik
2017-08-25	soc/intel/skylake: Add LPC and SPI lock down config option	Subrata Banik
2017-08-23	soc/intel/skylake: Usable dram top calculation based on HW registers	Subrata Banik
2017-08-22	soc/intel/skylake: Lock sideband access in coreboot and not in FSP	Barnali Sarkar
2017-08-21	soc/intel/skylake: Fix SGX init sequence	Pratik Prajapati
2017-08-21	intel/common/mp_init: Refactor MP Init code to get rid of microcode param	Pratik Prajapati
2017-08-21	intel/common/sgx: Use intel_mp_current_microcode() to get microcode pointer	Pratik Prajapati
2017-08-21	soc/intel/skylake: Add support for all UART port index	Subrata Banik
2017-08-21	soc/intel/skylake: Add Kconfig option to select UART index	Subrata Banik
2017-08-19	soc/intel/skylake: Enable power button SMI when jumping to payload	Furquan Shaikh
2017-08-18	include/device: Split i2c.h into three	Nico Huber
2017-08-17	soc/intel/skylake: Configure FSP to skip ME MBP step	Duncan Laurie
2017-08-16	soc/intel/skylake: Add proper support to enable UART2 in 16550 mode	Subrata Banik
2017-08-15	soc/intel/{cannonlake,skylake}: fix PCH_P2SB_EPMASK macro	Aaron Durbin
2017-08-10	soc/intel/skylake: Enable UART debug controller on S3 resume	Furquan Shaikh
2017-08-10	soc/intel/common/uart: Refactor uart_common_init	Furquan Shaikh
2017-08-08	soc/intel: Remove ACPI notification for fan speed change	Sumeet Pawnikar
2017-08-08	soc/intel/skylake: Log wakes caused by PME on internal bus and PCIE RP	Naresh G Solanki
2017-08-03	soc/intel/skylake: Skip disabled IGD device	Subrata Banik
2017-07-28	soc/intel/skylake: Remove incorrect ME PG-status print	Barnali Sarkar
2017-07-27	soc/intel/skylake/igd.c: check return value of init_igd_opregion	Martin Kepplinger
2017-07-26	soc/intel/skylake/chip.h: Provide enum values for SataMode	Nico Huber
2017-07-25	soc/intel/skylake: Add IGD id for mobile Xeon with GT2	Nico Huber
2017-07-25	soc/intel/skylake: soc/intel/skylake: Initialize struct member to 0	Subrata Banik
2017-07-25	soc/intel/skylake: Skip Spi Flash Lockdown from FSP	Barnali Sarkar
2017-07-24	soc/intel/skylake: Use common opregion implementation	Patrick Rudolph
2017-07-21	soc/intel/skylake: Perform LPC offset read after lockdown operation	Subrata Banik
2017-07-21	soc/intel/skylake: Rectify LPC Lock Enable (LE) bit definition	Subrata Banik
2017-07-20	soc/intel/skylake: Remove dead `CONFIG_PRE_GRAPHICS_DELAY`	Nico Huber
2017-07-20	soc/intel/skylake/igd: Remove dead quirk from dead code path	Nico Huber
2017-07-20	soc/intel/skylake: Fix broken memory info HOB scanning	Nico Huber
2017-07-18	vboot: Remove get_sw_write_protect_state callback	Julius Werner
2017-07-18	soc/intel/skylake: Enable SMBus based on mainboard config	Naresh G Solanki
2017-07-18	soc/intel/skylake: Remove Heci2 and Heci3 from wake resource list	Subrata Banik
2017-07-17	soc/intel/skylake: remove top_of_32bit_ram() declaration	Aaron Durbin
2017-07-14	soc/intel/skylake: Set PsysPL2 MSR	Shelley Chen
2017-07-13	Rename __attribute__((packed)) --> __packed	Stefan Reinauer
2017-07-13	soc/intel/skylake: reduce postcar stack usage for fsp 2.0	Aaron Durbin
2017-07-12	soc/intel/skylake: Remove “disable SaGv” in recovery mode flow	Subrata Banik
2017-07-12	Revert "soc/intel/skylake: storage: Add 2ms delay before exiting D3"	Subrata Banik
2017-07-12	soc/intel/skylake: Perform PCR read after all PCR write	Subrata Banik
2017-07-11	soc/intel/skylake: Fix PMC address range setup for PCH-H	Nico Huber
2017-07-11	soc/intel/skylake: Set generic I/O decode ranges early	Nico Huber
2017-07-10	sgx: Move SGX code to intel/common/block	Pratik Prajapati
2017-07-01	soc/intel/skylake: Remove unnecessary P-State and Flex Ratio assignment	Barnali Sarkar
2017-06-29	soc/intel/skylake/Kconfig: Drop useless FSP1.1/2.0 prompts	Nico Huber
2017-06-27	soc/intel/common/opregion: Use enum cb_err as return value	Patrick Rudolph
2017-06-27	soc/intel/skylake: storage: Use word access for power state registers	Duncan Laurie
2017-06-27	soc/intel/skylake: storage: Add 2ms delay before exiting D3	Duncan Laurie
2017-06-23	soc/intel/skylake: Remove post SMM Relocation uCode loading	Barnali Sarkar
2017-06-23	soc/intel/skylake: Use CPU MP Init Common code	Barnali Sarkar
2017-06-16	soc/intel/skylake: Use SCS common code	Bora Guvendik
2017-06-16	soc/intel/skylake: Don't allow user to change DCACHE base and size	Arthur Heymans
2017-06-14	soc/intel/skylake: Add missing PCH_DEV_* definitions	Furquan Shaikh
2017-06-14	soc/intel/skylake: Add USB port number information to wake source	Furquan Shaikh
2017-06-13	Consolidate reset API, add generic reset_prepare mechanism	Julius Werner
2017-06-09	soc/intel/skylake: Enable ACPI PM timer emulation on all CPUs	Subrata Banik
2017-06-09	soc/intel/skylake: Use CPU common library code	Barnali Sarkar
2017-06-09	soc/intel/skylake: Move update microcode from cbfs to mp_ops callbacks	Barnali Sarkar
2017-06-09	soc/intel/skylake: Cache the MMIO BIOS region	Aaron Durbin
2017-06-09	soc/intel/skylake: Use common systemagent code	Subrata Banik
2017-06-09	soc/skylake: add ACPI method to generate USB port info	Matt DeVillier
2017-06-08	fsp/gop: Add running the GOP to the choice of gfx init	Nico Huber
2017-06-07	src: change coreboot to lowercase	Martin Roth
2017-06-06	soc/intel/skylake: Use PCI IDs from device/pci_ids.h	Subrata Banik
2017-06-06	soc/intel/skylake/chip.h: Reorder declarations	Nico Huber
2017-06-06	soc/intel/skylake/chip.h: Provide some enums	Nico Huber
2017-06-05	soc/intel/skylake: Use Intel timer common code	Aamir Bohra
2017-06-05	soc/intel/skylake: Add config for cpu base clock frequency	Aamir Bohra
2017-06-05	soc/intel/common/block: add bios caching to fast spi module	Aaron Durbin
2017-06-03	soc/intel/skylake: Add macro for setting GPIO interrupt trigger mode.	Kane Chen
2017-05-27	soc/intel/skylake: Add detailed information about PME wake sources	Furquan Shaikh
2017-05-27	soc/intel/skylake: Add missing PCH_DEV_PCIE* definitions	Furquan Shaikh
2017-05-25	soc/intel/skylake: Implement GPIO ACPI AML generating functions	Furquan Shaikh
2017-05-22	soc/intel/skylake: Display FPF status of CSME	Pratik Prajapati
2017-05-22	soc/intel/skylake: Add entry for deep Sx wake	Furquan Shaikh
2017-05-22	soc/intel/skylake: Use Intel SATA common code	Aamir Bohra
2017-05-22	soc/intel/skylake: Use Intel PCIe common code	Aamir Bohra
2017-05-18	intel/common/block/i2c: Add common block for I2C and use the same in SoCs	Rizwan Qureshi
2017-05-16	soc/intel/skylake: Add option to enable/disable EIST	Subrata Banik
2017-05-16	soc/intel/skylake: Configure C-state interrupt response time	Subrata Banik
2017-05-09	soc/intel/skylake: Use common/blocks/uart code	Aamir Bohra
2017-05-09	soc/intel/skylake: Use intel/common/block/smbus code	Aamir Bohra
2017-05-08	soc/intel/skylake: Enable MTRR check	Furquan Shaikh
2017-05-08	soc/intel/skylake: Enable PARALLEL_MP_AP_WORK	Furquan Shaikh
2017-05-08	soc/intel/skylake: remove unused SMI functions	Aaron Durbin
2017-05-05	soc/intel/common: Provide common block fast_spi_flash_ctrlr	Furquan Shaikh
2017-05-05	soc/intel/skylake: Enable SATA ports	Shelley Chen
2017-05-04	soc/intel/skylake: Remove unused skylake_i2c_config structure	Furquan Shaikh
2017-05-04	intel/skylake: nhlt: Add 48Khz 2ch 16bit config for max98927	Duncan Laurie
2017-05-02	soc/intel/skylake: Clean up code by using common FAST_SPI module	Barnali Sarkar
2017-05-02	soc/intel/skylake: Set xtal bypass on low power idle	Naresh G Solanki
2017-05-01	soc/intel/skylake: Add ID for Fizz i7	Shelley Chen
2017-04-28	soc/intel/skylake: Use ITSS common code	Bora Guvendik
2017-04-28	intel/skylake: Switch FADT to ACPI version 3.0	Werner Zeh