coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2017-08-22	soc/intel/skylake: Lock sideband access in coreboot and not in FSP	Barnali Sarkar
2017-07-21	soc/intel/skylake: Perform LPC offset read after lockdown operation	Subrata Banik
2017-05-02	soc/intel/skylake: Clean up code by using common FAST_SPI module	Barnali Sarkar
2017-05-02	soc/intel/skylake: Set xtal bypass on low power idle	Naresh G Solanki
2017-04-10	soc/intel/skylake: Use common PCR module	Subrata Banik
2016-08-18	skylake: Do FspTempRamInit only for FSP1.1 & tidy up PCH early init	Rizwan Qureshi
2016-08-14	soc/intel/skylake: Change name pmc_tco_regs to smbus_tco_regs	Barnali Sarkar
2016-08-08	soc/intel/skylake: Cleanup patch for Skylake SoC	Barnali Sarkar
2016-02-15	skylake: Finalize SMM in coreboot	Duncan Laurie
2016-02-04	intel/skylake: disable ACPI PM Timer to enable XTAL OSC shutdown	Archana Patni
2016-02-04	intel/skylake: Display ME firmware status before os boot	Dhaval Sharma
2016-01-17	intel/skylake: disable heci1 if psf is unlocked	Archana Patni
2016-01-15	intel/skylake: More UPD params are added for PCH policy in FSP	Rizwan Qureshi
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-07-16	soc/intel: Add Skylake SOC support	Lee Leahy
2015-07-16	soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC	Lee Leahy