| Age | Commit message (Expand) | Author |
|---|
| 2021-02-15 | soc/intel/*: Move prmrr_core_configure | Patrick Rudolph |
| 2021-02-11 | src: Remove unused <arch/cpu.h> | Elyes HAOUAS |
| 2020-10-28 | soc/intel: deduplicate ACPI timer emulation | Michael Niewöhner |
| 2020-10-26 | soc/intel: drop unneeded ISST configuration code | Michael Niewöhner |
| 2020-10-24 | {cpu,soc}/intel: deduplicate cpu code | Michael Niewöhner |
| 2020-10-21 | {cpu,soc}/intel: replace AES-NI locking by common implemenation call | Michael Niewöhner |
| 2020-10-21 | soc/intel: convert XTAL frequency constant to Kconfig | Michael Niewöhner |
| 2020-10-14 | soc/intel/skylake/cpu.c: Fix comment coding style | Angel Pons |
| 2020-09-21 | src/soc/intel: Drop unneeded empty lines | Elyes HAOUAS |
| 2020-06-28 | soc/intel/common: add TCC activation functionality | Sumeet R Pawnikar |
| 2020-06-16 | cpu/x86: Define MTRR_CAP_PRMRR | Kyösti Mälkki |
| 2020-06-16 | soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS) | Kyösti Mälkki |
| 2020-06-06 | src: Remove unused '#include <cpu/x86/smm.h>' | Elyes HAOUAS |
| 2020-06-02 | src: Remove unused 'include <bootstate.h>' | Elyes HAOUAS |
| 2020-06-02 | src: Remove unused '#include <timer.h>' | Elyes HAOUAS |
| 2020-05-18 | skylake: update processor power limits configuration | Sumeet R Pawnikar |
| 2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
| 2020-05-01 | src: Remove unused 'include <cpu/x86/cache.h>' | Elyes HAOUAS |
| 2020-04-06 | soc/intel/skylake: Use SPDX for GPL-2.0-only files | Angel Pons |
| 2020-03-18 | soc: Remove copyright notices | Patrick Georgi |
| 2020-03-10 | soc/intel: fix eist enabling | Matt Delco |
| 2019-11-22 | intel/smm: Provide common smm_relocation_params | Kyösti Mälkki |
| 2019-11-11 | soc/{cannonlake,skylake}: Remove unused 'rdmsr(MSR_CONFIG_TDP_NOMINAL)' | Elyes HAOUAS |
| 2019-11-04 | soc/intel/sgx: convert SGX and PRMRR devicetree options to Kconfig | Michael Niewöhner |
| 2019-11-02 | soc/intel: common,apl,skl: remove orphaned memory locking API | Michael Niewöhner |
| 2019-10-31 | soc/intel/{cnl,icl,skl}: Fix multiple whitespace issue | Subrata Banik |
| 2019-10-23 | soc/intel/skylake: lock AES-NI MSR | Michael Niewöhner |
| 2019-10-10 | soc/intel: sgx: get rid of UEFI-style usage of global variable | Michael Niewöhner |
| 2019-10-02 | soc/intel: Replace config_of_path() with config_of_soc() | Kyösti Mälkki |
| 2019-08-15 | soc/intel: Rename some SMM support functions | Kyösti Mälkki |
| 2019-08-15 | soc/*: mp_run_on_all_cpus: Remove configurable timeout | Patrick Rudolph |
| 2019-08-06 | soc/*: Report mp_init errors | Patrick Rudolph |
| 2019-07-30 | soc/intel/{broad,cannon,sky}: Fix possible out-of-bounds reads | Jacob Garber |
| 2019-07-21 | soc/intel/skylake: Enable Energy/Performance Bias control | Matthew Garrett |
| 2019-07-18 | soc/intel: Use config_of_path(SA_DEVFN_ROOT) | Kyösti Mälkki |
| 2019-07-13 | soc,southbridge/intel: Avoid preprocessor with HAVE_SMI_HANDLER | Kyösti Mälkki |
| 2019-05-21 | soc/intel: Remove unused pointer argument in mca_configure() | Subrata Banik |
| 2019-04-26 | soc/{amd,intel}/chip: Use local include for chip.h | Elyes HAOUAS |
| 2019-04-23 | src: include <assert.h> when appropriate | Elyes HAOUAS |
| 2019-04-06 | src: Use include <delay.h> when appropriate | Elyes HAOUAS |
| 2019-03-20 | src: Use 'include <string.h>' when appropriate | Elyes HAOUAS |
| 2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
| 2019-02-18 | soc/intel/skylake: Use real common code for VMX init | Nico Huber |
| 2019-01-16 | soc/intel/skylake: Access conf pointer only if its not null | Pratik Prajapati |
| 2019-01-07 | soc/intel: Standardize names of common MSRs | Elyes HAOUAS |
| 2018-12-18 | soc: Remove unneeded include <pc80/mc146818rtc.h> | Elyes HAOUAS |
| 2018-12-13 | cpuid: Add helper function for cpuid(1) functions | Subrata Banik |
| 2018-11-12 | src: Remove unneeded include "{arch,cpu}/cpu.h" | Elyes HAOUAS |
| 2018-10-11 | src: Move common IA-32 MSRs to <cpu/x86/msr.h> | Elyes HAOUAS |
| 2018-10-08 | soc/intel/skylake: Fix ‘dev’ pointer NULL before being dereferenced | Subrata Banik |
| 2018-10-05 | soc/intel/skylake: check for NULL with if condition | Pratik Prajapati |
| 2018-08-20 | soc/intel/skylake: Support PL1 override option | Wei Shun Chang |
| 2018-06-28 | intel/common: change mca_configure API's def | Pratik Prajapati |
| 2018-06-21 | soc/intel/{skl,kbl}: ensure C1E is disabled after S3 resume | Cole Nelson |
| 2018-06-04 | soc/intel/skylake: Get rid of device_t | Elyes HAOUAS |
| 2018-05-17 | soc/intel/skylake: Fix AP timeout issue while executing sgx_configure | Subrata Banik |
| 2018-05-14 | cpu/x86: Add support to run function with argument over APs | Subrata Banik |
| 2018-03-28 | soc/intel/skylake: enable VMX support | Matt DeVillier |
| 2018-03-26 | soc/skylake/cpu: Fix Intel SpeedStep enable/disable | Matt DeVillier |
| 2018-02-05 | soc/intel/skylake: Set PsysPl3 and Pl4 | Shelley Chen |
| 2017-12-22 | soc/intel/skylake: Make use of common SMM code for SKL | Subrata Banik |
| 2017-09-15 | soc/intel/common/sgx: Define and use soc_fill_sgx_param() | Pratik Prajapati |
| 2017-09-11 | cpu/x86/mp_init: remove adjust_cpu_apic_entry() | Aaron Durbin |
| 2017-09-02 | soc/intel/skylake: Use common mca_configure() API | Pratik Prajapati |
| 2017-08-21 | soc/intel/skylake: Fix SGX init sequence | Pratik Prajapati |
| 2017-08-21 | intel/common/mp_init: Refactor MP Init code to get rid of microcode param | Pratik Prajapati |
| 2017-08-21 | intel/common/sgx: Use intel_mp_current_microcode() to get microcode pointer | Pratik Prajapati |
| 2017-07-14 | soc/intel/skylake: Set PsysPL2 MSR | Shelley Chen |
| 2017-07-10 | sgx: Move SGX code to intel/common/block | Pratik Prajapati |
| 2017-06-23 | soc/intel/skylake: Remove post SMM Relocation uCode loading | Barnali Sarkar |
| 2017-06-23 | soc/intel/skylake: Use CPU MP Init Common code | Barnali Sarkar |
| 2017-06-09 | soc/intel/skylake: Enable ACPI PM timer emulation on all CPUs | Subrata Banik |
| 2017-06-09 | soc/intel/skylake: Use CPU common library code | Barnali Sarkar |
| 2017-06-09 | soc/intel/skylake: Move update microcode from cbfs to mp_ops callbacks | Barnali Sarkar |
| 2017-06-09 | soc/intel/skylake: Cache the MMIO BIOS region | Aaron Durbin |
| 2017-06-07 | src: change coreboot to lowercase | Martin Roth |
| 2017-06-05 | soc/intel/skylake: Add config for cpu base clock frequency | Aamir Bohra |
| 2017-05-16 | soc/intel/skylake: Add option to enable/disable EIST | Subrata Banik |
| 2017-05-16 | soc/intel/skylake: Configure C-state interrupt response time | Subrata Banik |
| 2017-05-08 | soc/intel/skylake: Enable MTRR check | Furquan Shaikh |
| 2017-04-24 | soc/intel/skylake: Add ID's for Kabylake-R | Naresh G Solanki |
| 2017-03-23 | soc/intel/skylake: Add SGX initialization | Robbie Zhang |
| 2017-03-17 | soc/intel/skylake: Fix remaining issues detected by checkpatch | Lee Leahy |
| 2017-03-17 | soc/intel/skylake: Wrap lines at 80 columns | Lee Leahy |
| 2017-03-17 | soc/intel/skylake: Add int to unsigned | Lee Leahy |
| 2017-03-06 | soc/intel/skylake: Clean up CPU code | Subrata Banik |
| 2017-02-22 | soc/intel/skylake: Fix broken suspend-resume | Furquan Shaikh |
| 2017-02-17 | intel/skylake: add function is_secondary_thread() | Robbie Zhang |
| 2017-02-16 | soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO... | Sooi, Li Cheng |
| 2017-02-14 | soc/intel/skylake: Perform CPU MP Init before FSP-S Init | Subrata Banik |
| 2016-12-26 | soc/intel/skylake: set TCC activation by BSP only | Sumeet Pawnikar |
| 2016-11-14 | skylake: Update the thermal time window for throttling action | Sumeet Pawnikar |
| 2016-08-06 | soc/intel/skylake: Add Kabylake device Ids | Rizwan Qureshi |
| 2016-07-31 | src/soc: Capitalize CPU, ACPI, RAM and ROM | Elyes HAOUAS |
| 2016-05-06 | soc/intel/skylake: convert to using common MP and SMM init | Aaron Durbin |
| 2016-05-02 | cpu/x86/mp_init: remove unused callback arguments | Aaron Durbin |
| 2016-03-29 | intel/skylake: Enable PROCHOT | Pratik Prajapati |
| 2016-03-08 | x86 chipsets: utilize x86_setup_mtrrs_with_detect() | Aaron Durbin |
| 2016-03-01 | Skylake: Support Intel Speed Shift Technology based on config | Subrata Banik |
| 2016-01-22 | intel/skylake: Thermal Design Power PL1 and PL2 Config Changes | pchandri |
