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path: root/src/soc/intel/skylake/chip.h
AgeCommit message (Expand)Author
2016-01-18intel/skylake: Add devicetree setting for DDR frequency limit UPDDuncan Laurie
2016-01-17intel/skylake: disable heci1 if psf is unlockedArchana Patni
2016-01-16intel/skylake: Add VrConfig UPD parameters from corebootRizwan Qureshi
2016-01-16intel/skylake: Enable SkipMpInit tokenRizwan Qureshi
2016-01-15intel/skylake: More UPD params are added for PCH policy in FSPRizwan Qureshi
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-27intel/skylake: Clean up USB configuration in devicetreeDuncan Laurie
2015-10-27intel/skylake: IRQ programming through UPDSubrata Banik
2015-10-27intel/skylake: FSP 1.7.0 MemoryInit/SiliconInit params updateRizwan Qureshi
2015-09-17intel/skylake: Create "RtcLock" Silicon UPD from corebootBarnali Sarkar
2015-09-10skylake: Enable DPTF based on devicetree settingDuncan Laurie
2015-09-08skylake: Clean up chip.hDuncan Laurie
2015-08-19skylake: Update Memory and Silicon Init paramsRizwan Qureshi
2015-08-14skylake: remove ec_smi_gpio and alt_gp_smi_enAaron Durbin
2015-08-14skylake: provide GPE0 routing devicetree configurationAaron Durbin
2015-08-14skylake: remove IedSize from chip.hAaron Durbin
2015-08-13skylake: Add Deep Sx configuration for wake pinsDuncan Laurie
2015-07-21skylake: Show SPI controller if enabled in devicetree.cbDuncan Laurie
2015-07-16soc/intel: Add Skylake SOC supportLee Leahy
2015-07-16soc/intel/skylake: Use Broadwell as comparision base for Skylake SOCLee Leahy
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