coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2024-10-23	soc/intel/pantherlake: Update PlatformDebugOption to Trace Ready	Jamie Ryu
2024-10-21	soc/intel: Use NEM+ effective way size for for ADL, MTL and PTL	Jeremy Compostella
2024-10-02	soc/intel: Deprecate SoC-specific global reset status configs	Subrata Banik
2024-09-23	soc/intel/pantherlake: Disable Total Memory Encryption	Jamie Ryu
2024-09-18	soc/intel/ptl: Add SoC ACPI directory for Panther Lake	Ravi Sarawadi
2024-09-13	soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage	Saurabh Mishra
2024-09-07	drivers/intel/fsp2_0: Consolidate `BUILDING_WITH_DEBUG_FSP` option	Subrata Banik
2024-09-07	drivers/intel/fsp2_0: Add Kconfig option to control MBP HOB creation	Subrata Banik
2024-08-21	soc/intel/ptl: Dump SoC QDF from report_cpu_info in bootblock	Jamie Ryu
2024-08-21	soc/intel/pantherlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT	Subrata Banik
2024-08-16	soc/intel/ptl: Do initial Panther Lake SoC commit till romstage	Saurabh Mishra
2024-08-11	soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock	Saurabh Mishra