| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-11-02 | soc/intel: Enable GPIO functions in verstage | Duncan Laurie |
| 2018-10-09 | soc/intel/common/block/pcr: Add NULL pointer check in pcr_execute_sideband_msg() | Subrata Banik |
| 2018-06-14 | src: Get rid of device_t | Elyes HAOUAS |
| 2018-05-14 | soc/intel/denverton_ns: port gpio to intelblock | Julien Viard de Galbert |
| 2018-04-20 | pci: Move inline PCI functions to pci_ops.h | Patrick Rudolph |
| 2018-02-22 | soc/intel/common/block/pcr: Add function for executing PCH SBI message | Subrata Banik |
| 2018-02-20 | src/soc: Fix various typos | Jonathan Neuschäfer |
| 2017-05-16 | soc/intel/common: Add sanity check of PCR_BASE_ADDRESS | Lijian Zhao |
| 2017-04-10 | soc/intel/common/block: Add Intel common PCR support | Subrata Banik |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |