summaryrefslogtreecommitdiff
path: root/src/soc/intel/cannonlake
AgeCommit message (Expand)Author
2020-06-16arch/x86: Create helper for APM_CNT SMI triggersKyösti Mälkki
2020-06-14soc/intel/cannonlake/acpi: Capitalize hex number to unify with SkylakePaul Menzel
2020-06-10soc/intel/cannonlake: Put braces around *else* branchPaul Menzel
2020-06-10ACPI: Remove Kconfig COMMON_FADTKyösti Mälkki
2020-06-02soc/intel/common/{pch,sata}: Remove SATA common code driverSubrata Banik
2020-06-02soc/intel/cannonlake: Add RP configuration settingsChristian Walter
2020-06-02soc/intel/*/bootblock/cpu.c: Drop unused includesElyes HAOUAS
2020-06-02src: Remove unused '#include <cpu/x86/lapic.h>'Elyes HAOUAS
2020-05-28soc/intel/common: Improve Type16 SMBIOS tablesPatrick Rudolph
2020-05-27soc/intel/gma: Implement fsp_soc_get_igd_bar() in common codeNico Huber
2020-05-27soc/intel/gma: Move DDI-A 4-lane config to common codeNico Huber
2020-05-27soc/intel/gma: Move display and opregion init to common codeNico Huber
2020-05-27drivers/intel/gma: Move IGD OpRegion to CBMEMNico Huber
2020-05-26cannonlake: update processor power limits configurationSumeet R Pawnikar
2020-05-26soc/intel/cannonlake: Add VrPowerDeliveryDesign to chip optionsChristian Walter
2020-05-26intel/cannonlake: Implement PCIe RP devicetree updateNico Huber
2020-05-18src: Remove unused 'include <string.h>'Elyes HAOUAS
2020-05-18src: Remove leading blank lines from SPDX headerElyes HAOUAS
2020-05-14soc/intel: Drop ABOVE_4GB_MEM_BASE_SIZE and use cpu_phys_address_size()Furquan Shaikh
2020-05-14soc/intel/common/block/systemagent: Use TOUUD as base for MMIO above 4GFurquan Shaikh
2020-05-12device/pci_device: Extract pci_domain_set_resources from SOCRaul E Rangel
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-09src/: Replace GPL boilerplate with SPDX headersPatrick Georgi
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-05-04soc/intel/cannonlake: Add DisableHeciRetry to configChristian Walter
2020-05-02acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh
2020-05-01soc/intel/cannonlake: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-05-01soc/intel/cannonlake/bootblock: Fix FSP CARPatrick Rudolph
2020-05-01src: Remove not used 'include <smbios.h>'Elyes HAOUAS
2020-05-01src: Remove unused 'include <cpu/x86/cache.h>'Elyes HAOUAS
2020-04-28soc/intel: Constify struct device *param to sd_fill_soc_gpio_infoFurquan Shaikh
2020-04-28device: Constify struct device * parameter to write_acpi_tablesFurquan Shaikh
2020-04-28soc/intel/cannonlake: Report driver strength by _DSM in eMMC ACPI deviceKane Chen
2020-04-28soc/intel/cometlake: Add ucode from repoFelix Singer
2020-04-18soc/intel/*/vr_config.c: Use __func__ in error messageAngel Pons
2020-04-17soc/intel: Disable config option for SCS by defaultDuncan Laurie
2020-04-13acpi: Bump FADT to revision 6Patrick Rudolph
2020-04-10Replace DEVICE_NOOP with noop_(set|read)_resourcesNico Huber
2020-04-10Drop unnecessary DEVICE_NOOP entriesNico Huber
2020-04-09soc/intel/cannonlake: Steal no memory for disabled IGDChristian Walter
2020-04-09soc/intel: Remove unneeded whitespacesElyes HAOUAS
2020-04-06soc/intel/cannonlake: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-05fsp2_0: Gather Kconfig declarationsNico Huber
2020-04-02Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`Nico Huber
2020-03-30intel/fsp2_0: Make FSP_USE_REPO a SoC opt-inJohanna Schander
2020-03-25soc/intel/cometlake: Use IntelFSP repoFelix Singer
2020-03-23soc/intel/cfl/vr_config: Add 8-core desktop CPU supportPatrick Rudolph
2020-03-18soc: Remove copyright noticesPatrick Georgi
2020-03-17soc/intel/cannonlake: Set correct serirq modeJeremy Soller
2020-03-12soc/intel/*/smihandler: Only compile in TCO SMI handler if neededPatrick Georgi
2020-03-10soc/intel: fix eist enablingMatt Delco
2020-03-07intel/soc: skl,apl,cnl,icl,tgl: add INTRUDER relevant registersMichael Niewöhner
2020-03-07intel/soc: skl,apl,cnl,icl,tgl,common: enable TCO SMIs if selectedMichael Niewöhner
2020-03-04soc/intel/cpu: Select NO_FIXED_XIP_ROM_SIZEArthur Heymans
2020-03-04src: capitalize 'PCIe'Elyes HAOUAS
2020-03-02soc/intel/{common, skl, cnl, apl}: Move print_me_fw_version() to CSE libSridhar Siricilla
2020-02-28soc/intel/cannonlake: Plumb TetonGlacierMode into dtEdward O'Callaghan
2020-02-26soc/intel/{cnl,icl}: Avoid static 8254 clock gating on S3 resumeSubrata Banik
2020-02-25soc/intel/common/block: Move cse common functions into block/cseSubrata Banik
2020-02-25soc/intel/common/block: Move smihandler common functions into common codeSubrata Banik
2020-02-25soc/intel/cannonlake: Add TDC config for CMLMarx Wang
2020-02-24soc/intel/cnl: Rename hfsts into me_hfstsSridhar Siricilla
2020-02-17src/intel: Define HFSTS3 registerSridhar Siricilla
2020-02-17soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774Wim Vervoorn
2020-02-17soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is setWim Vervoorn
2020-02-17vboot: remove VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT optionJoel Kitching
2020-02-09soc/intel/{cnl,icl,skl,tgl,common}: Make changes to send_heci_reset_req_messa...Sridhar Siricilla
2020-02-09soc/intel/{common,skl,cnl,icl,apl,tgl}: Move HFSTS1 register definition to SoCSridhar Siricilla
2020-02-04soc/intel: Add get_pmbaseEugene Myers
2020-02-04soc/intel/cannonlake: Allow Audio DSP OSC qualification for low power idleAamir Bohra
2020-02-04soc/intel: Remove duplicate CPUID entrySubrata Banik
2020-01-18soc/intel/cannonlake/bootblock: Add CML-S 2/4-Core MCH IDsGaggery Tsai
2020-01-18soc/intel/cannonlake: Add chip config for SATA strengthJamie Chen
2020-01-16soc/intel/{cnl,icl,skl, tgl}: Move SOC_INTEL_COMMON_BLOCK_THERMAL into SoC sp...Subrata Banik
2020-01-14soc/intel/cannonlake: Fix ASL compilation remarksSubrata Banik
2020-01-10soc/intel/{apl,cnl,icl,skl,tgl}: Make above 4GB MMIO resource properSubrata Banik
2020-01-09sb/intel/common: Add smbus_set_slave_addr()Kyösti Mälkki
2020-01-09soc/intel/{cnl,icl,tgl}: Move northbridge.asl into common/block/acpiSubrata Banik
2020-01-08soc/intel/cannonlake: Add VR config for CMLJamie Chen
2020-01-08soc/intel/cannonlake: Add Comet Lake H SA 4+2 Device IDJamie Chen
2020-01-07soc/intel/{apl,cnl,icl,skl,tgl}: Clean up SA ASL codeSubrata Banik
2020-01-06soc/intel/cannonlake: Add VR config for CFL, CNL and WHLPatrick Rudolph
2019-12-31soc/intel/{icl,cnl,tgl}: Always add PM1_TMR block to FADTMeera Ravindranath
2019-12-26soc/intel/cannonlake: Move GPIO PM configuration to soc levelEric Lai
2019-12-26soc/intel/cannonlake: Clean up report_cpu_info() functionUsha P
2019-12-26soc/intel/cannonlake: Refactor pch_early_init() codeUsha P
2019-12-19{drivers,soc}/intel/fsp2_0: Move chipset specific logo handling to SoCWim Vervoorn
2019-12-19src/soc/intel: Remove unused <stdlib.h>Elyes HAOUAS
2019-12-19src: Use '#include <smp/node.h>' when appropriateElyes HAOUAS
2019-12-17soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash rangeWim Vervoorn
2019-12-16src/soc/intel/cannonlake: Bump MAX_CPU from 8->12Edward O'Callaghan
2019-12-163rdparty/fsp: Update to current master againNico Huber
2019-12-12soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.hFurquan Shaikh
2019-12-10include/device/pci_ids: Add Coffeelake U IGD P630Christian Walter
2019-12-093rdparts/fsp: Update fsp submoduleJohanna Schander
2019-12-03soc/intel/cannonlake: Configure GPIO PM configuration in bootblockSubrata Banik
2019-12-02soc/intel/cannonlake: Add gfx.asl fileMathew King
2019-12-02soc/intel/cannonlake: Fix compilationPraveen Hodagatta Pranesh
2019-12-02src/soc/intel: Add Cometlake-S and CMP-H skusGaggery Tsai