coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-02-22	soc/intel/cannonlake: Add ASL function for setting pad mode	Rizwan Qureshi
2019-02-21	soc/intel/cannonlake: Add field to identify single channel memory	Shelley Chen
2019-02-15	soc/intel/cannonlake: Define VR settings	Roy Mingi Park
2019-02-07	soc/intel/cannonlake: Configure GPIOs again after FSP-S is done	Furquan Shaikh
2019-01-25	soc/intel/cannonlake: Export function to set After G3 state	Duncan Laurie
2019-01-16	soc/intel/cannonlake: Add processor power limits control support	Sumeet Pawnikar
2019-01-16	buildsystem: Promote rules.h to default include	Kyösti Mälkki
2019-01-10	soc/intel/common/block: Move tco common functions into block/smbus	Subrata Banik
2019-01-09	soc/intel/cannonlake: Enable/Disable IPU based on devicetree switch	V Sowmya
2019-01-08	soc/intel/cannonlake: Add chipset event logging	Duncan Laurie
2019-01-03	soc/intel/cannonlake: Add cannonlake ACPI GPIO op	Lijian Zhao
2018-12-19	soc/intel/cannonlake: Amend comment typo	Lijian Zhao
2018-12-14	soc/intel/cannonlake: Fix CNL-H GPIO pin map	Duncan Laurie
2018-11-27	soc/intel/cannonlake: Delete unused macros in lpc.h	Subrata Banik
2018-11-16	src: Get rid of duplicated includes	Elyes HAOUAS
2018-11-12	src: Remove unneeded include "{arch,cpu}/cpu.h"	Elyes HAOUAS
2018-11-01	src: Add missing include <stdint.h>	Elyes HAOUAS
2018-10-30	src: Add missing include <stdint.h>	Elyes HAOUAS
2018-10-26	soc/intel/cannonlake: Add back PM TIMER EMULATION	Lijian Zhao
2018-10-17	soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions	praveen hodagatta pranesh
2018-10-17	soc/intel/cannonlake: Add new cannon lake PCH-H support	praveen hodagatta pranesh
2018-10-11	src: Move common IA-32 MSRs to <cpu/x86/msr.h>	Elyes HAOUAS
2018-10-09	soc/intel/cannonlake: Make correct IRQ mapping for CNL SA and PCH PCI devices	Subrata Banik
2018-10-09	soc/intel/cannonlake: Ensure FSP don't override ITSS IPCx registers	Subrata Banik
2018-10-08	Move compiler.h to commonlib	Nico Huber
2018-10-04	src/soc/intel/cannonlake: Fix IA32_PLATFORM_DCA_CAP address	Elyes HAOUAS
2018-09-21	soc/intel/cannonlake: Correct ITSS port id.	praveen hodagatta pranesh
2018-09-20	soc/intel/cannonlake: Remove const for spd_smbus_address	Lijian Zhao
2018-08-30	soc/intel/cannonlake: Update PMC base address for CNP H and LP	Maulik V Vaghela
2018-08-28	soc/intel/cannonlake: Change LPDDR4 to MEMCFG	Lijian Zhao
2018-08-22	cbtable: remove chromeos_acpi from cbtable	Joel Kitching
2018-08-20	soc/intel/common/block: Move common uart function to block/uart	Subrata Banik
2018-06-28	soc/intel/common/block: Move p2sb common functions into block/p2sb	Subrata Banik
2018-06-22	soc/intel/cannonlake: Remove DMA support for PTT	Subrata Banik
2018-06-06	soc/intel/common/block: Add common chip config block	Subrata Banik
2018-06-04	src/soc: Get rid of whitespace before tab	Elyes HAOUAS
2018-02-22	soc/intel/cannonlake: Add emmc/sdc port id	Lijian Zhao
2018-02-22	soc/intel/cannonlake: Add provision to make CSME function disable in SMM mode	Subrata Banik
2018-02-20	src/soc: Fix various typos	Jonathan Neuschäfer
2018-02-16	soc/intel/cannonlake: Add missing GPIO pin definitions	Lijian Zhao
2018-02-11	soc/intel/cannonlake: Add Pch iSCLK programming	Lijian Zhao
2018-01-23	src/soc/intel/cannonlake: Update C-state latency control limits	Vaibhav Shankar
2018-01-23	mainboard/intel/cannonlake_rvp: Add support for MAX98373 speaker amp	N, Harshapriya
2018-01-23	soc/intel/cannonlake: Add audio NHLT support	Lijian Zhao
2018-01-09	soc/intel/cannonlake: Remove redundent CNL CPUID macros	Subrata Banik
2018-01-07	soc/intel/cannonlake: provide LPDDR4 memory init	Nick Vaccaro
2018-01-05	soc/intel/cannonlake: Correct PMC/GPIO routing information	Lijian Zhao
2017-12-13	src/soc/intel/cannonlake: Add _PRW for CNVi	Bora Guvendik
2017-12-11	soc/intel/cannonlake: Add support for D0 stepping	Lijian Zhao
2017-12-08	soc/intel/cannonlake: Add PCH ID support in bootblock/report_platform.c	Subrata Banik
2017-12-05	soc/intel/cannonlake: Fix DSX_CFG macro name for AC_PRESENT	Furquan Shaikh
2017-11-17	soc/intel/cannonlake: fix gpio pin numbers	Bora Guvendik
2017-11-11	soc/intel/{cannonlake,skylake}: Add _soc_ prefix in spi soc routine	Subrata Banik
2017-11-04	sb and soc: Enforce correct offset of member "chromeos" in global_nvs_t	Jonathan Neuschäfer
2017-10-27	soc/intel/cannonlake: Use common p2sb driver	Lijian Zhao
2017-10-26	soc/intel/cannonlake: Add support for C state and P state	Shaunak Saha
2017-10-19	soc/intel/cannonlake: Fix HECI error on reset	Lijian Zhao
2017-10-19	soc/intel/cannonlake: Use EBDA structure to store soc reserve memory size	Subrata Banik
2017-10-18	soc/intel/cannonlake: Update PCIE CLKREQ programing	Lijian Zhao
2017-10-18	soc/intel/cannonlake: Add finalize function	Lijian Zhao
2017-10-18	soc/intel/cannonlake: Use EBDA area to store cbmem_top address	Subrata Banik
2017-10-03	soc/intel/cannonlake: change gpio device name	Bora Guvendik
2017-10-03	soc/intel/cannonlake: add initial ASL methods for SCS, GPIO	Bora Guvendik
2017-10-03	soc/intel/cannonlake: Add northbridge dsdt table	Lijian Zhao
2017-10-03	soc/intel/cannonlake: Fill the SMI usage	Lijian Zhao
2017-10-03	soc/intel/cannonlake: Add lpc pci driver	Lijian Zhao
2017-09-20	soc/intel/cannonlake: Add PMC pci drivers	Lijian Zhao
2017-09-14	src/soc/intel/cannonlake: Define USB configuration params	Pratik Prajapati
2017-09-13	soc/intel/cannonlake: Add serialio device config	Lijian Zhao
2017-09-13	soc/intel/cannonlake: Add common ACPI support for CNL	Lijian Zhao
2017-09-01	soc/intel/cannonlake: Perform dram top calculation based on HW registers	Subrata Banik
2017-08-26	soc/intel/cannonlake: use __packed	Aaron Durbin
2017-08-25	soc/intel/cannonlake: Init UPD params based on config	Pratik Prajapati
2017-08-22	soc/intel/cannonlake: Define soc_intel_cannonlake_config	Pratik Prajapati
2017-08-21	soc/intel/cannonlake: Enable common PMC code for CNL	Lijian Zhao
2017-08-21	soc/intel/cannonlake: Add support for all UART port index	Subrata Banik
2017-08-17	soc/intel/cannonlake: Add SPI flash controller driver	Lijian Zhao
2017-08-15	soc/intel/cannonlake: Rectify LPC Lock Enable (LE) bit definition	Subrata Banik
2017-08-15	soc/intel/cannonlake: Call into FSP siliconinit	Lijian Zhao
2017-08-15	soc/intel/{cannonlake,skylake}: fix PCH_P2SB_EPMASK macro	Aaron Durbin
2017-08-14	soc/intel/cannonlake: Remove unused systemagent registers	Subrata Banik
2017-08-11	soc/cannonlake: Enable SMM code for Cannon Lake	Brandon Breitenstein
2017-08-11	soc/intel/cannonlake: Add missing _PCH_DEV definitions	Furquan Shaikh
2017-08-07	soc/intel/cannonlake: Add memory map support	Lijian Zhao
2017-07-27	soc/intel/cannonlake: Correct gpio definition	Lijian Zhao
2017-07-24	Fix files with multiple newlines at the end.	Martin Roth
2017-07-21	Revert "soc/intel/cannonlake: Call into FSP siliconinit"	Martin Roth
2017-07-21	soc/intel/cannonlake: Call into FSP siliconinit	Lijian Zhao
2017-07-19	soc/intel/cannonlake: Add minimal changes to call FSP Memoryinit	Lijian Zhao
2017-07-18	soc/intel/cannonlake: Fix Build break	Lijian Zhao
2017-07-18	soc/intel/cannonlake: Use common GPIO driver	Andrey Petrov
2017-07-18	soc/intel/cannonlake: Add PMC headers	Andrey Petrov
2017-07-17	soc/intel/cannonlake: remove top_of_32bit_ram() declaration	Aaron Durbin
2017-07-13	soc/intel/cannonlake: Add bootblock PCH	Andrey Petrov
2017-07-13	soc/intel/cannonlake: Add early CPU initialization	Andrey Petrov
2017-07-12	soc/intel/cannonlake: Add PCI dev macros and IDs	Andrey Petrov
2017-07-02	soc/intel/cannonlake: Add bootblock.c	Andrey Petrov