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Commit message (
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Author
2019-11-26
soc/intel/cannonlake: Add chip config to override CPU flex ratio
Subrata Banik
2019-11-04
soc/intel/sgx: convert SGX and PRMRR devicetree options to Kconfig
Michael Niewöhner
2019-09-29
soc/intel: Rename <intelblocks/chip.h>
Kyösti Mälkki
2019-09-12
soc/intel/cnl: Remove unnecessary FSP UPD “PchPwrOptEnable” usage
Subrata Banik
2019-09-12
soc/intel/cannonlake: Add config for sata devslp pad reset configuration
Aamir Bohra
2019-08-26
soc/intel/cannonlake: Add config to disable display audio codec
Aamir Bohra
2019-08-20
soc/intel/cnl: Add provision to configure SD controller write protect pin
Aamir Bohra
2019-06-28
soc/intel/cannonlake: fix use of legacy 8254 timer
Matt DeVillier
2019-06-21
soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASE
Arthur Heymans
2019-05-20
soc/intel/cannonlake: Make use of gpio_pm_configure()
Subrata Banik
2019-05-11
soc/intel/cnl: Enable VT-d
John Zhao
2019-05-09
soc/intel/cannonlake: Fix pcie clock number
Lijian Zhao
2019-05-07
mb/google/sarien: Add SMBIOS type 9 fields
Lijian Zhao
2019-05-01
mb/google/sarien: Disable S5 wake on LAN by default
Eric Lai
2019-04-23
soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig
Kane Chen
2019-04-16
soc/intel/cannonlake: Configure Vmx support using Kconfig
Ronak Kanabar
2019-04-01
soc/intel/cannonlake: Add FSP UPD to unlock GPIO pads in devicetree
Krishna Prasad Bhat
2019-03-27
soc/intel/cannonlake: Configure voltage margining policies
Krzysztof Sywula
2019-03-21
soc/intel/cannonlake: Assign FSP UPDs for HPD and Data/CLK of DDI ports
Krishna Prasad Bhat
2019-03-16
soc/intel/cannonlake: Add required FSP UPD changes for CML
Subrata Banik
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2019-02-22
soc/intel/cannonlake: Add support for setting FSP-S PcieRpHotPlug from device...
Jeremy Soller
2019-02-21
src/soc/intel/cannonlake: Add PsysPmax setting
Gaggery Tsai
2019-02-07
soc/intel/cannonlake: Add Whiskeylake SoC kconfig
Subrata Banik
2019-01-28
src/soc/intel/cnl/chip.h: Fix preprocessor condition
Angel Pons
2019-01-17
soc/intel/cannonlake: Change in SaGv options
Ronak Kanabar
2019-01-16
soc/intel/cannonlake: Add processor power limits control support
Sumeet Pawnikar
2019-01-08
soc/intel/cannonlake: Add FSP UPD for minimum assertion width
Duncan Laurie
2018-12-19
soc/intel/cannonlake: SATA and DMI power optimize
Lijian Zhao
2018-12-19
soc/intel/cannonlake: Auto turn on HDA controller
Lijian Zhao
2018-12-19
soc/intel/cannonlake: Declare SATA Mode clear
Lijian Zhao
2018-12-19
soc/intel/cannonlake: Add Acoustic features
Lijian Zhao
2018-11-17
soc/intel/cannonlake: Add options for pcie ltr
Lijian Zhao
2018-11-15
soc/intel/cannonlake: Make static IRQ mapping for PIC mode
Subrata Banik
2018-11-13
soc/intel/cannonlake: Remove SmbusEnable
Duncan Laurie
2018-11-07
mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT gener...
Subrata Banik
2018-10-17
soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions
praveen hodagatta pranesh
2018-09-28
soc/intel/cannonlake: Update UPD from device switch
Lijian Zhao
2018-08-09
src/soc: Fix typo
Elyes HAOUAS
2018-06-22
soc/intel/common/block/cpu: Add option to skip coreboot AP init
Subrata Banik
2018-06-06
soc/intel/common/block: Add common chip config block
Subrata Banik
2018-06-05
soc/intel/cannonlake: Add option to skip coreboot MP init
Subrata Banik
2018-04-05
soc/intel/cannonlake: Add VT-d and VMX programming
Lijian Zhao
2018-03-28
soc/intel/cannonlake: Limit xDCI feature when VBOOT is enabled
Duncan Laurie
2018-03-14
soc/intel/cannonlake: Add SaGv value definition
Lijian Zhao
2018-02-22
soc/intel/cannonlake: Add more HDA Audio Link settings
Lijian Zhao
2018-02-11
soc/intel/cannonlake: Add Pch iSCLK programming
Lijian Zhao
2018-02-08
soc/intel/cannonlake: Add support for EMMC DLL update
Lijian Zhao
2018-01-23
mainboard/intel/cannonlake_rvp: Add support for SND_MAX98357_DA7219
Lijian Zhao
2018-01-05
soc/intel/cannonlake: Correct PMC/GPIO routing information
Lijian Zhao
2017-12-22
ic2/designware: Move Intel i2c logic to shared driver
Chris Ching
2017-12-05
soc/intel/cannonlake: Fix DSX_CFG macro name for AC_PRESENT
Furquan Shaikh
2017-11-04
soc/intel/cannonlake: Install common i2c
Lijian Zhao
2017-11-01
soc/intel/cannonlake: Use SCS common code
Bora Guvendik
2017-10-18
soc/intel/cannonlake: Set platform Debug Probe Type
Lijian Zhao
2017-10-18
soc/intel/cannonlake: Update PCIE CLKREQ programing
Lijian Zhao
2017-10-03
soc/intel/cannonlake: Add lpc pci driver
Lijian Zhao
2017-09-20
soc/intel/cannonlake: Add PMC pci drivers
Lijian Zhao
2017-09-13
soc/intel/cannonlake: Add serialio device config
Lijian Zhao
2017-09-13
soc/intel/cannonlake: Add common ACPI support for CNL
Lijian Zhao
2017-08-30
soc/intel/cannonlake: Add PrmrrSize and C6DRAM config
Subrata Banik
2017-08-25
soc/intel/cannonlake: Init UPD params based on config
Pratik Prajapati
2017-08-22
soc/intel/cannonlake: Define soc_intel_cannonlake_config
Pratik Prajapati
2017-08-21
soc/intel/cannonlake: Enable common PMC code for CNL
Lijian Zhao
2017-08-17
soc/intel/cannonlake: Add SPI flash controller driver
Lijian Zhao
2017-08-15
soc/intel/cannonlake: Call into FSP siliconinit
Lijian Zhao
2017-07-21
Revert "soc/intel/cannonlake: Call into FSP siliconinit"
Martin Roth
2017-07-21
soc/intel/cannonlake: Call into FSP siliconinit
Lijian Zhao