coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-01-24	soc/intel/broadwell: Drop enable check from LPD0/LPD3	Angel Pons
2021-01-20	ACPI GNVS: Drop most dev_count_cpu()	Kyösti Mälkki
2020-12-03	src: Remove redundant use of ACPI offset(0)	Elyes HAOUAS
2020-11-13	soc/intel/broadwell/pch/acpi/hda.asl: Rename to `audio.asl`	Angel Pons
2020-11-13	soc/intel/broadwell/pch/acpi: Clean up cosmetics	Angel Pons
2020-11-04	soc/intel/broadwell: Merge `device_nvs.asl` into `globalnvs.asl`	Angel Pons
2020-11-04	soc/intel/broadwell: Include EC and IRQ links ACPI early	Angel Pons
2020-11-04	soc/intel/broadwell/pch: Use common PCIe ACPI code	Angel Pons
2020-11-04	soc/intel/broadwell/pch/acpi: Add PCIe register offsets	Angel Pons
2020-11-04	soc/intel/broadwell: Use common irqlinks.asl	Angel Pons
2020-11-04	soc/intel/broadwell/pch/acpi/irqlinks.asl: Add missing IRQs	Angel Pons
2020-11-04	soc/intel/broadwell: Align ACPI with Haswell/Lynxpoint	Angel Pons
2020-11-03	soc/intel/broadwell: Relocate PCH ACPI files	Angel Pons