coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2016-04-30	soc/apollolake: Prevent PMC BAR reassignment during resource allocation	Hannah Williams
2016-04-15	soc/apollolake: Add helper functions to access Power Management Registers	Hannah Williams
2016-04-13	soc/intel/apollolake: Add tsc_freq.c to all the stages	Andrey Petrov
2016-04-11	soc/apollolake: Add lpc device driver	Lance Zhao
2016-04-11	soc/intel/apollolake: Enable CACHE_MRC_SETTINGS	Hannah Williams
2016-04-11	soc/intel/apollolake: Implement SPI controller driver	Alexandru Gagniuc
2016-04-02	soc/intel/apollolake: use CAR code coherency for all CAR stages	Aaron Durbin
2016-03-23	soc/intel/apollolake: utilize postcar phase/stage	Aaron Durbin
2016-03-21	soc/apollolake: Add skeleton ACPI entry	Lance Zhao
2016-03-10	soc/apollolake: Add memory and reserve MMIO resources	Andrey Petrov
2016-03-10	soc/intel/apollolake: Avoid UART BAR relocation at ramstage	Andrey Petrov
2016-03-10	soc/intel/apollolake: Add chip initialization	Andrey Petrov
2016-03-10	soc/apollolake: Enable all CPU cores using the parallel MP lib	Ravi Sarawadi
2016-03-08	soc/intel/apollolake: Add cbmem_top() implementation	Andrey Petrov
2016-03-08	soc/intel/apollolake: Add romstage that calls FSP2.0 driver	Andrey Petrov
2016-03-08	soc/intel/apollolake: Add support for memory-mapped boot media	Andrey Petrov
2016-02-26	soc/intel/apollolake: group serial console options into one Kconfig	Aaron Durbin
2016-02-11	soc/apollolake: Add early serial driver for BOOTBLOCK_CONSOLE	Andrey Petrov
2016-02-11	soc/apollolake: Add minimal GPIO driver	Andrey Petrov
2016-02-11	soc/apollolake: Add initial cache-as-ram setup for bootblock	Alexandru Gagniuc
2016-01-30	soc/intel: Add skeleton infrastructure for Apollolake SOC	Alexandru Gagniuc