coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2017-09-26	binaryPI: Drop Options.h include	Kyösti Mälkki
2017-09-26	AGESA: Avoid cpuRegisters.h include	Kyösti Mälkki
2017-09-22	AGESA binaryPI: Clean up amdfamXX.h include	Kyösti Mälkki
2017-09-20	vboot: reset vbnv in cmos when cmos failure occurs	Aaron Durbin
2017-09-20	vboot: remove init_vbnv_cmos()	Aaron Durbin
2017-09-19	amd/stoneyridge: Add northbridge definitions	Marshall Dawson
2017-09-15	soc/amd/stoneyridge: Improve code quality	Richard Spiegel
2017-09-13	amd/stoneyridge: Remove duplicate PCI definitions	Marshall Dawson
2017-09-13	amd/stoneyridge: Remove multi-node support	Marshall Dawson
2017-09-13	amd/stoneyridge: Simplify SB link routing	Marshall Dawson
2017-09-13	amd/stoneyridge: Remove CONFIG_LOGICAL_CPUS setup	Marshall Dawson
2017-09-13	amd/stoneyridge: Remove PSP BAR init from cpu init	Marshall Dawson
2017-09-13	amd/stoneyridge: Make cbmem_top SMM aware	Marshall Dawson
2017-09-10	amdfw: Clean up makefiles a bit more	Martin Roth
2017-09-08	soc/amd/stoneyridge: Update amdfw build	Martin Roth
2017-09-06	soc/amd/stoneyridge: Use __packed	Jonathan Neuschäfer
2017-08-29	amd/stoneyridge: Change ACPI _PR.CPxx to _PR.Pxxx	Marc Jones
2017-08-28	soc/amd: Standardize guards on header files	Martin Roth
2017-08-28	soc/amd/stoneyridge: Increase preram console size	Marshall Dawson
2017-08-25	amd/pi/hudson: Fix FCH EC	Martin Roth
2017-08-25	soc/amd/stoneyridge: Move IMC ASL source	Kyösti Mälkki
2017-08-25	soc/amd/stoneyridge: Move oem_fan_control()	Kyösti Mälkki
2017-08-23	soc/amd/stoneyridge ACPI: Sync sleepstates.asl definitions	Kyösti Mälkki
2017-08-14	stoneyridge: Fix CPU ASL \_PR table	Marc Jones
2017-08-14	stoneyridge: Rename hudson to southbridge	Marc Jones
2017-08-07	usbdebug: Refactor early enable	Kyösti Mälkki
2017-08-07	usbdebug: Consolidate EHCI_BAR setup	Kyösti Mälkki
2017-08-04	soc/amd/stoneyridge: Use generic gpio library	Marc Jones
2017-07-31	soc/amd/stoneyridge: Add GPIO functions to romstage	Marc Jones
2017-07-31	soc/amd/stoneyridge: Fix GPIO bank1 control definition	Marshall Dawson
2017-07-31	soc/amd/stoneyridge: Move ACPI MADT table to soc	Marc Jones
2017-07-31	soc/amd/stoneyridge: Add GNVS	Marc Jones
2017-07-27	soc/amd/stoneyridge: Remove unused SD controller	Marshall Dawson
2017-07-27	soc/amd/stoneyridge: Enable verstage support	Marshall Dawson
2017-07-27	soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK	Marshall Dawson
2017-07-27	soc/amd/stoneyridge: Convert 48Mhz enable to read/write32	Marshall Dawson
2017-07-27	soc/amd/stoneyridge: Clarify BAR mask in SPI base	Marshall Dawson
2017-07-16	soc/amd/stoneyridge:Fix IS_ENABLED() around Kconfig symbol references	Martin Roth
2017-07-13	Rename __attribute__((packed)) --> __packed	Stefan Reinauer
2017-07-12	soc/amd/stoneyridge: Update header guards and includes	Marshall Dawson
2017-07-11	binaryPI: Define AGESA blob in CBFS as Kconfig string	Kyösti Mälkki
2017-07-08	soc/amd/stoneyridge/northbridge.c: remove unnecessary null check	Martin Kepplinger
2017-07-02	soc/amd/common: Add initial support for AMD PSP	Marshall Dawson
2017-06-29	soc/amd/stoneyridge: Convert monotonic timer	Marshall Dawson
2017-06-28	soc/amd/stoneyridge: Revise pci_devs.h file	Marshall Dawson
2017-06-28	soc/amd/stoneyridge: Fix device IDs	Marshall Dawson
2017-06-28	soc/amd/stoneyridge: Enable early cbmem	Marshall Dawson
2017-06-27	soc/amd/stoneyridge: Add tseg size to Kconfig	Marshall Dawson
2017-06-27	soc/stoneyridge: Remove IDE controller	Marshall Dawson
2017-06-27	soc/stoneyridge: Remove FCH PCIe support	Marshall Dawson
2017-06-27	soc/amd/stoneyridge: Remove PCIe-PCI bridge	Marshall Dawson
2017-06-27	soc/amd/common: Fix most checkpatch errors	Marshall Dawson
2017-06-27	soc/amd/stoneyridge: Fix most checkpatch errors	Marshall Dawson
2017-06-27	soc/amd/stoneyridge/acpi: Fix checkpatch errors	Marshall Dawson
2017-06-27	vendorcode/amd: Unify Porting.h across all targets	Stefan Reinauer
2017-06-26	soc/amd/stoneyridge: Add northbridge support	Marc Jones
2017-06-26	soc/amd/stoneyridge: Add CPU files	Marc Jones
2017-06-26	soc: Add AMD Stoney Ridge southbridge code	Marc Jones