Age | Commit message (Expand) | Author |
2021-06-30 | src: Move `select ARCH_X86` to platforms | Angel Pons |
2021-06-28 | soc/amd/cezanne: Add call to mb to configure eSPI requirements | Martin Roth |
2021-06-23 | soc/amd/cezanne: Init eSPI early if required | Martin Roth |
2021-06-21 | soc/amd/cezanne/fsp_m_params: set HD Audio enable UPD from devicetree | Felix Held |
2021-06-21 | soc/amd/cezanne/fsp_m_params: set SATA enable UPD from devicetree info | Felix Held |
2021-06-18 | soc/amd/picasso,stoneyridge/acpi: use defines for MADT parameters | Felix Held |
2021-06-16 | soc/amd/cezanne/include/soc/iomap: add eMMC MMIO base addresses | Felix Held |
2021-06-16 | soc/amd/cezanne,picasso/include/soc/iomap: reflow I2C_DEVICE_COUNT | Felix Held |
2021-06-16 | soc/amd/cezanne/acpi/mmio: use AOAC offset defines | Felix Held |
2021-06-16 | soc/amd/cezanne: factor out AOAC offset defines | Felix Held |
2021-06-16 | soc/amd/cezanne,picasso: add AOAC offset define for the eMMC controller | Felix Held |
2021-06-14 | soc/amd/{cezanne,picasso}: Add TS_START_ROMSTAGE | Raul E Rangel |
2021-06-13 | soc/amd/cezanne: Supply SMBIOS/DMI Type 17 data | Nikolai Vyssotski |
2021-06-13 | soc/amd/cezanne: call boot_with_psp_timestamp | Kangheui Won |
2021-06-11 | soc/amd/cezanne: remove warm reset flag code | Felix Held |
2021-06-11 | cpu/x86/lapic: Replace LOCAL_APIC_ADDR references | Kyösti Mälkki |
2021-06-07 | cpu/x86: Default to PARALLEL_MP selected | Kyösti Mälkki |
2021-06-07 | soc/amd/cezanne: Configure I2C Pad RX Select through devicetree | Karthikeyan Ramasubramanian |
2021-06-07 | cezanne/psp_verstage: add reset/timer svc | Kangheui Won |
2021-06-01 | soc/amd/cezanne/include/iomap: properly align defines | Felix Held |
2021-05-31 | soc/amd/cezanne: Add pre-FSPM call to the mainboard | Martin Roth |
2021-05-27 | soc/amd/cezanne: add devicetree setting for PSPP policy | Felix Held |
2021-05-26 | soc/amd/cezanne: add support for the changed AMD FSP API for USB PHY | Julian Schroeder |
2021-05-22 | soc/amd: reduce MCACHE size with psp_verstage | Kangheui Won |
2021-05-22 | soc/amd/cezanne,picasso/reset: use byte I/O read for NCP_ERR | Felix Held |
2021-05-21 | soc/amd/cezanne,common,picasso: use BERT region reserved by FSP driver | Felix Held |
2021-05-19 | soc/amd/cezanne/fch: add PCIe GPP clock generator configuration settings | Felix Held |
2021-05-16 | soc/amd/*/Makefile.inc: Strip the quotes | Zheng Bao |
2021-05-14 | soc/amd/cezanne: Enable GFX HDA FSP UPD | Karthikeyan Ramasubramanian |
2021-05-13 | soc/amd: factor out acpigen_write_alib_dptc to common code | Felix Held |
2021-05-13 | soc/amd/cezanne/root_complex: generate DPTC ACPI method | Felix Held |
2021-05-12 | soc/amd/cezanne/chip.h: add DPTC and tablet mode options | Felix Held |
2021-05-12 | soc/amd{common,cezanne}: Move pcie_gpp.c to common | Raul E Rangel |
2021-05-10 | soc/amd/cezanne: Force resets to be cold | Marshall Dawson |
2021-05-10 | cezanne/psp_verstage: update SRAM address | Kangheui Won |
2021-05-10 | amd/cezanne: verify transfer buffer in bootblock | Kangheui Won |
2021-05-10 | psp_verstage: differentiate bios entry | Kangheui Won |
2021-05-10 | psp_verstage: move platform-specific code to chipset.c | Kangheui Won |
2021-05-10 | cezanne/psp_verstage: clean up duplicated target | Kangheui Won |
2021-05-10 | cezanne/psp_verstage: populate a/b firmware | Kangheui Won |
2021-05-09 | soc/amd/cezanne: Generate PCI GPP ACPI names | Raul E Rangel |
2021-05-09 | soc/amd/cezanne: Enable GNB IO-APIC _PRT | Raul E Rangel |
2021-05-09 | soc/amd/cezanne: add GNB IOAPIC support | Felix Held |
2021-05-09 | soc/amd/cezanne: Generate PCI routing table | Raul E Rangel |
2021-05-09 | soc/amd/cezanne: Populate PCI_INTR registers | Raul E Rangel |
2021-05-08 | soc/amd/cezanne/acpi/soc: call WAL1 for AC/DC state ALIB call | Felix Held |
2021-05-05 | soc/amd/cezanne/agesa_acpi: add add_agesa_fsp_acpi_table call | Felix Held |
2021-05-05 | soc/amd/cezanne/agesa_acpi: add and call agesa_write_acpi_tables | Felix Held |
2021-05-02 | soc/amd/cezanne: add verstage files | Kangheui Won |
2021-04-30 | amd/cezanne: Add telemetry setting to UPD | Chris Wang |
2021-04-29 | soc/amd/cezanne: Enable Audio Co-processor driver | Karthikeyan Ramasubramanian |
2021-04-28 | soc/amd/cezanne: copy psp_transfer.h from picasso | Kangheui Won |
2021-04-28 | soc/amd/cezanne: copy Kconfig options for psp_verstage | Kangheui Won |
2021-04-26 | soc/amd/cezanne: Update STAPM vars with units | Martin Roth |
2021-04-26 | amd/cezanne: Add slow_ppt_time & thermctl_limit to UPD | Martin Roth |
2021-04-26 | soc/amd/cezanne/fsp_m_params: Configure the s0i3_enable UPD | Karthikeyan Ramasubramanian |
2021-04-26 | soc/amd/cezanne,picasso/Kconfig: add help text for MAX_CPUS | Felix Held |
2021-04-26 | soc/amd/cezanne & picasso: Add Kconfig for hardcoded Soft Fuse bits | Martin Roth |
2021-04-23 | soc/amd/cezanne/cpu: make sure that MAX_CPUS isn't overridden | Felix Held |
2021-04-23 | soc/amd/cezanne: fix i2c compiler errors on non-x86 | Kangheui Won |
2021-04-22 | guybrush: Add Kconfig for PSP eSPI and port80 | Rob Barnes |
2021-04-21 | soc/amd/{cezanne,common}/acpi: Add _OSC method | Raul E Rangel |
2021-04-21 | soc/amd/cezanne: add SMU settings to devicetree | Felix Held |
2021-04-21 | soc/amd/cezanne: add downcoring and SMT disable settings to devicetree | Felix Held |
2021-04-21 | soc/amd/cezanne/chip.h: include missing types.h | Felix Held |
2021-04-21 | soc/amd/cezanne: Add support for C-state 3 | Raul E Rangel |
2021-04-20 | soc/amd/{common,cezanne}: Add uPEP device | Raul E Rangel |
2021-04-19 | Revert "soc/amd/cezanne: Add support to perform early EC sync" | Karthikeyan Ramasubramanian |
2021-04-18 | soc/amd/cezanne/Kconfig: add missing ACPI_BERT and ACPI_BERT_SIZE | Felix Held |
2021-04-16 | soc/amd/cezanne: Update FADT to support S0i3 | Jason Glenesk |
2021-04-16 | soc/amd/cezanne: Add modern standby option to chip config | Mathew King |
2021-04-16 | soc/amd/cezanne: Port ACPI p-state and c-state entries from picasso | Jason Glenesk |
2021-04-16 | soc/amd/cezanne: Add uart controllers to chipset.cb | Ivy Jian |
2021-04-16 | soc/amd/cezanne: Select VBNV_CMOS | Raul E Rangel |
2021-04-14 | soc/amd/cezanne/fch: process ACPI PM/GPE and GPIO events | Felix Held |
2021-04-14 | soc/amd/cezanne: save chipset state to CBMEM | Martin Roth |
2021-04-10 | soc/amd/cezanne: Set Power state after power failure | Karthikeyan Ramasubramanian |
2021-04-10 | soc/amd/cezanne: Add GRXS and GTXS method | Eric Lai |
2021-04-08 | soc/amd: remove special GPIO_2 override soc_gpio_hook | Kyösti Mälkki |
2021-04-07 | soc/amd/cezanne: Pass DXIO and DDI Descriptors to FSP | Matt Papageorge |
2021-04-07 | vc/amd/fsp/cezanne: update UPD headers | Matt Papageorge |
2021-04-05 | soc/amd/cezanne: Add soc/msr.h | Raul E Rangel |
2021-04-05 | soc/amd: Make espi_clear_decodes private | Raul E Rangel |
2021-04-05 | soc/amd: Make espi_configure_decodes private | Raul E Rangel |
2021-04-05 | soc/amd/cezanne: Clear eSPI ranges before configuring eSPI | Martin Roth |
2021-04-02 | soc/amd/cezanne: Add support to perform early EC sync | Karthikeyan Ramasubramanian |
2021-04-01 | soc/amd/cezanne: Enable GENERIC_GPIO_LIB | Raul E Rangel |
2021-04-01 | soc/amd/cezanne: Add device tree support for I2C | Raul E Rangel |
2021-03-30 | soc/amd/cezanne: Comment the AOAC register access | Karthikeyan Ramasubramanian |
2021-03-29 | soc/amd/cezanne: factor out UPD-M configuration from romstage | Felix Held |
2021-03-29 | soc/amd/cezanne,picasso: rename fsp_params.c to fsp_s_params.c | Felix Held |
2021-03-29 | soc/amd: add DISABLE_KEYBOARD_RESET_PIN option | Felix Held |
2021-03-29 | soc/amd/cezanne: Implement PROVIDES_ROM_SHARING | Raul E Rangel |
2021-03-29 | soc/amd: move PM_RST_CTRL1 register definition to common acpimmio header | Felix Held |
2021-03-29 | soc/amd/*/gpio: include types.h instead of stdint.h to have size_t | Felix Held |
2021-03-24 | mb/google/guybrush: disable KBRSTEN | Kangheui Won |
2021-03-23 | soc/amd/cezanne: select HAVE_EM100_SUPPORT | Felix Held |
2021-03-22 | soc/amd/cezanne: Initialize I2C | Zheng Bao |
2021-03-22 | soc/amd/cezanne: Get I2C specific code for cezanne | Zheng Bao |
2021-03-18 | soc/amd/cezanne/pci_gpp: Add ACPI names for GPP bridges | Raul E Rangel |