coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-03-12	soc/amd: GOP: add UPD for VBIOS buffer	Nikolai Vyssotski
2021-03-12	soc/amd/cezanne: add XHCI SCI/GEVENT setup	Felix Held
2021-03-12	soc/amd/common/block/smu: rename mailbox register defines	Felix Held
2021-03-11	soc/amd: move warm reset flag function prototypes to common code	Felix Held
2021-03-10	soc/amd/cezanne: Add USB ports to chipset.cb	Mathew King
2021-03-10	mb/amd/majolica: Update to use proper APCBs built for Majolica	Matt Papageorge
2021-03-10	soc/amd/cezanne: select common APOB NV cache code	Felix Held
2021-03-10	soc/amd/cezanne/smihandler: add ELOG and SMMSTORE support	Felix Held
2021-03-09	soc/amd/cezanne/Makefile: pass APOB NV parameters to amdfwtool	Felix Held
2021-03-08	soc/amd/cezanne: Include gpio.c in smm	Mathew King
2021-03-08	soc/amd/cezanne: Allow GPIO defines to be used in ASL	Mathew King
2021-03-04	soc/amd/cezanne/chipset.cb: clean up and change some aliases	Felix Held
2021-03-04	soc/amd/cezanne/smihandler: implement S3 entry SMI handler	Felix Held
2021-03-04	soc/amd/cezanne: add SMU support	Felix Held
2021-03-03	soc/amd/cezanne/chipset.cb: rename alias for SATA controllers	Felix Held
2021-03-02	soc/amd/cezanne: Disable legacy DMA IO ports	Raul E Rangel
2021-03-02	soc/amd/cezanne: Fill out pci devices in chipset.cb	Mathew King
2021-03-01	soc/amd/cezanne: Add PSP whitelist debug unlock support	Raul E Rangel
2021-02-26	soc/amd/cezanne/acpi: Generate MADT LAPIC NMI settings	Raul E Rangel
2021-02-25	soc/amd/cezanne/acpi: Use IO addresses for ACPI block	Raul E Rangel
2021-02-25	soc/amd/cezanne/acpi: Add globalnvs.asl	Raul E Rangel
2021-02-25	soc/amd: only print CPU family and model in bootblock	Felix Held
2021-02-25	soc/amd/cezanne/Kconfig: sort selected options	Felix Held
2021-02-25	soc/amd/cezanne/acpi/pci0.asl: Add LPC device	Raul E Rangel
2021-02-24	soc/amd/cezanne: Add eSPI support	Zheng Bao
2021-02-24	soc/amd/cezanne/Makefile: move setting of PSP soft fuse bit 6	Felix Held
2021-02-22	soc/amd/cezanne/acpi: Add pci0.asl	Raul E Rangel
2021-02-22	soc/amd/cezanne/acpi/soc.asl: Add platform.asl	Raul E Rangel
2021-02-22	soc/amd/cezanne/acpi: Add MMIO devices	Raul E Rangel
2021-02-19	soc/amd/cezanne: add MP init and SMM initialization	Felix Held
2021-02-18	soc/amd/cezanne/root_complex: provide ACPI name in PCI device_operations	Felix Held
2021-02-18	soc/amd/cezanne/chip: add soc_acpi_name	Felix Held
2021-02-17	soc/amd/cezanne: Add FCH IO-APIC to MADT	Raul E Rangel
2021-02-17	soc/amd/cezanne/pcie_gpp: add pci_driver for external root ports	Felix Held
2021-02-17	soc/amd/cezanne/pcie_gpp: replace PCI ID list with single PCI ID	Felix Held
2021-02-17	soc/amd/cezanne/uart: write ACPI tables	Felix Held
2021-02-16	soc/amd/cezanne: Enable ACPI_SOC_NVS	Raul E Rangel
2021-02-16	soc/amd/cezanne/data_fabric: add ACPI names and SSDT entries	Felix Held
2021-02-15	soc/amd/cezanne: Add uart.c to smm so we can support DEBUG_SMI	Raul E Rangel
2021-02-14	soc/amd/cezanne: add partial data fabric setup	Felix Held
2021-02-14	soc/amd/cezanne/include/iomap: add HPET base address	Felix Held
2021-02-14	soc/amd/cezanne/chipset.cb: add SMBus and data fabric PCI devices	Felix Held
2021-02-14	soc/amd/cezanne: move CPU cluster to chipset device tree	Felix Held
2021-02-14	soc/amd/cezanne: Fill FADT and MADT	Raul E Rangel
2021-02-14	soc/amd/cezanne: Enable uCode update	Raul E Rangel
2021-02-13	soc/amd/cezanne: select ACPI support and make the compiler happy	Felix Held
2021-02-13	soc/amd/cezanne/acpi: Add plain soc.asl	Raul E Rangel
2021-02-13	soc/amd/cezanne: always include PSP secure OS in amdfw	Felix Held
2021-02-13	soc/amd/cezanne: always add S0i3 firmware part to amdfw	Felix Held
2021-02-13	soc/amd/cezanne/bootblock: call write_resume_eip in bootblock_c_entry	Felix Held
2021-02-12	soc/amd/cezanne: drop PWRS from GNVS	Felix Held
2021-02-12	soc/amd/cezanne: Add PCI IRQ Router definitions	Raul E Rangel
2021-02-12	soc/amd/cezanne/smihandler: add psp_notify_smm call	Felix Held
2021-02-12	soc/amd/cezanne: select RTC	Felix Held
2021-02-12	soc/amd: select ACPI_AMD_HARDWARE_SLEEP_VALUES in common ACPI code	Felix Held
2021-02-12	soc/amd/*/Kconfig: remove redundant SMM_TSEG condition	Felix Held
2021-02-11	soc/amd/cezanne/smihandler: add basic SMI APMC and sleep handler	Felix Held
2021-02-11	soc/amd/cezanne: select soc-specific ACPI functionality	Felix Held
2021-02-11	soc/amd/cezanne/chip: set device operations for UART MMIO devices	Felix Held
2021-02-11	soc/amd/cezanne: add empty mp_init_cpus	Felix Held
2021-02-11	soc/amd/cezanne/cpu: add basic zen_2_3_init functionality	Felix Held
2021-02-11	soc/amd/cezanne/smihandler: add missing southbridge_io_trap_handler	Felix Held
2021-02-11	soc/amd: include cpu/x86/smm directory in common SMM Makefile	Felix Held
2021-02-11	soc/amd: move southbridge_smi_handler to common code	Felix Held
2021-02-11	soc/amd: factor out common SMM relocation code	Felix Held
2021-02-11	soc/amd/cezanne: add empty SMM-handler	Felix Held
2021-02-10	soc/amd/cezanne/fch: add HAVE_SMI_HANDLER case to fch_init_acpi_ports	Felix Held
2021-02-10	soc/amd/cezanne: Add verstage support	Raul E Rangel
2021-02-10	soc/amd/cezanne: Enable SOC_AMD_COMMON_BLOCK_SPI	Raul E Rangel
2021-02-10	soc/amd/cezanne: Add SPI registers	Raul E Rangel
2021-02-10	soc/amd/cezanne/chip: add empty set_mmio_dev_ops	Felix Held
2021-02-10	soc/amd/cezanne/chip: add empty cpu_bus_ops	Felix Held
2021-02-10	soc/amd: Move soc_route_sci to common/blocks/smi/smi_util	Felix Held
2021-02-09	soc/amd/cezanne: Add root_complex	Raul E Rangel
2021-02-09	soc/amd/cezanne: add empty CPU driver	Felix Held
2021-02-09	soc/amd/cezanne: Enable early LPC support in bootblock stage	Zheng Bao
2021-02-09	soc/amd,intel: Drop s3_resume parameter on FSP-S functions	Kyösti Mälkki
2021-02-07	soc/amd/cezanne/romstage: Store early dram region	Raul E Rangel
2021-02-07	soc/amd/cezanne/Makefile.inc: Fix indentation	Raul E Rangel
2021-02-07	soc/amd/cezanne/pcie_gpp: scan internal PCI buses	Felix Held
2021-02-07	soc/amd/cezanne/chip: add PCI bus scanning	Felix Held
2021-02-05	soc/amd/cezanne/iomap: move MMIO range comment above MMIO ranges	Felix Held
2021-02-05	soc/amd/cezanne/fch: add ACPI I/O port setup	Felix Held
2021-02-05	soc/amd/cezanne: populate some FSP-M UPDs	Felix Held
2021-02-03	soc/amd/cezanne: remove UART2/3 AOAC device offsets	Felix Held
2021-02-03	amdfwtool:cezanne: Add entry of PSP_BOOTLOADER_AB (0x73)	Zheng Bao
2021-01-31	soc/amd/cezanne/Kconfig: select common PSP gen2 support	Felix Held
2021-01-31	soc/amd/cezanne: add soc/cpu.h with CPUID define for Cezanne A0 stepping	Felix Held
2021-01-30	soc/amd/cezanne: add use result of acpi_is_wakeup_s3() in FSP calls	Felix Held
2021-01-29	soc/amd/cezanne: add empty ramstage FCH support	Felix Held
2021-01-29	soc/amd/cezanne/chip: add FSP silicon init driver call	Felix Held
2021-01-29	device/Kconfig: Declare MMCONF symbols' type once	Angel Pons
2021-01-28	soc/amd/cezanne/Kconfig: move selections in alphabetical order	Felix Held
2021-01-28	soc/amd/cezanne/chip: add empty SoC device operations	Felix Held
2021-01-28	soc/amd/cezanne: compress FSP binaries in CBFS	Felix Held
2021-01-27	soc/amd/cezanne: Add UCODE firmware to CBFS	Zheng Bao
2021-01-27	soc/amd: Throw an error if FWM_POSITION_INDEX is empty	Zheng Bao
2021-01-24	soc/amd/cezanne/Kconfig: select missing SSE2 option	Felix Held
2021-01-24	soc/amd/cezanne/Kconfig: select X86_AMD_FIXED_MTRRS	Felix Held
2021-01-24	soc/amd/cezanne: add basic romstage	Felix Held