coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-08-12	soc/amd/cezanne,common: factor out CPPC code to common AMD SoC code	Felix Held
2022-01-26	soc/amd/cezanne,picasso,sabrina: factor out get_threads_per_core	Felix Held
2021-10-19	acpi/acpigen: Constify CST functions' pointers	Angel Pons
2021-07-15	soc/amd/cezanne: add ACPI CPPC support for AMD	Julian Schroeder
2021-06-18	soc/amd/picasso,stoneyridge/acpi: use defines for MADT parameters	Felix Held
2021-05-09	soc/amd/cezanne: add GNB IOAPIC support	Felix Held
2021-04-21	soc/amd/cezanne: Add support for C-state 3	Raul E Rangel
2021-04-16	soc/amd/cezanne: Update FADT to support S0i3	Jason Glenesk
2021-04-16	soc/amd/cezanne: Port ACPI p-state and c-state entries from picasso	Jason Glenesk
2021-02-26	soc/amd/cezanne/acpi: Generate MADT LAPIC NMI settings	Raul E Rangel
2021-02-25	soc/amd/cezanne/acpi: Use IO addresses for ACPI block	Raul E Rangel
2021-02-17	soc/amd/cezanne: Add FCH IO-APIC to MADT	Raul E Rangel
2021-02-14	soc/amd/cezanne: Fill FADT and MADT	Raul E Rangel
2021-02-13	soc/amd/cezanne: select ACPI support and make the compiler happy	Felix Held