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path: root/src/northbridge/intel/sandybridge
AgeCommit message (Expand)Author
2020-05-27drivers/intel/gma: Move IGD OpRegion to CBMEMNico Huber
2020-05-21nb/intel/sandybridge: Use the new IOSAV struct APIAngel Pons
2020-05-21nb/intel/sandybridge: Drop unused parametersAngel Pons
2020-05-21nb/intel/sandybridge: Redefine IOSAV_SUBSEQUENCEAngel Pons
2020-05-21nb/intel/sandybridge: Truncate IOSAV subseq gapsAngel Pons
2020-05-21nb/intel/sandybridge: Replace macros with functionsAngel Pons
2020-05-21nb/intel/sandybridge: Refactor IOSAV_RUN_ONCEAngel Pons
2020-05-21nb/intel/sandybridge: Refactor IOSAV_SUBSEQUENCE againAngel Pons
2020-05-19nb/intel/sandybridge: Do not hardcode resource indicesAngel Pons
2020-05-19nb/intel/sandybridge: Correct IOSAV register notesAngel Pons
2020-05-18nb/intel/sandybridge: Use or-based logic for RANKSELAngel Pons
2020-05-18nb/intel/sandybridge: Program IOSAV with macrosAngel Pons
2020-05-18nb/intel/sandybridge: Add and use BROADCAST_CH for IOSAVAngel Pons
2020-05-14nb/intel/sandybridge: add resources during read_resources()Aaron Durbin
2020-05-12device/pci_device: Extract pci_domain_set_resources from SOCRaul E Rangel
2020-05-12nb/intel/sandybridge: Reorder IOSAV writesAngel Pons
2020-05-12nb/intel/sandybridge: Reorder register writeAngel Pons
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-09vboot: Clean up pre-RAM use of vboot_recovery_mode_enabled()Julius Werner
2020-05-02acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh
2020-04-28device: Constify struct device * parameter to acpi_fill_ssdt()Furquan Shaikh
2020-04-28device: Constify struct device * parameter to write_acpi_tablesFurquan Shaikh
2020-04-19nb/intel/sandybridge: Refactor get_mem_min_tckAngel Pons
2020-04-14nb/intel/sandybridge/raminit: Add ECC supportPatrick Rudolph
2020-04-14nb/intel/sandybridge/raminit: Add ECC detection supportPatrick Rudolph
2020-04-10Replace DEVICE_NOOP with noop_(set|read)_resourcesNico Huber
2020-04-10Drop unnecessary DEVICE_NOOP entriesNico Huber
2020-04-05Drop explicit NULL initializations from `device_operations`Elyes HAOUAS
2020-04-02nb/intel/sandybridge: Simplify GMA SSDT generatorMatt DeVillier
2020-04-02Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`Nico Huber
2020-03-31drivers/intel/gma: fold gma.asl into default_brightness_levels.aslMatt DeVillier
2020-03-26nb/intel/sandybridge: Use macros for JEDEC commandsAngel Pons
2020-03-26nb/intel/sandybridge: Fix IOSAV register descriptionAngel Pons
2020-03-26nb/intel/sandybridge: Correct TC_DTP handlingAngel Pons
2020-03-26nb/intel/sandybridge: Add and use TC_DTP definitionAngel Pons
2020-03-26nb/intel/sandybridge: Use IOSAV_BYTE_SERROR_C_ch macroAngel Pons
2020-03-26nb/intel/sandybridge: Update commentAngel Pons
2020-03-26nb/intel/sandybridge: Rename raminit_ivy.cAngel Pons
2020-03-26nb/intel/sandybridge: Drop dead codeAngel Pons
2020-03-26nb/intel/sandybridge: Unify the code pathsAngel Pons
2020-03-26nb/intel/sandybridge: Add print for PLL_REF100_CFGAngel Pons
2020-03-26nb/intel/sandybridge: Rewrite get_FRQAngel Pons
2020-03-25nb/intel/sandybridge: Cache FRQ indexAngel Pons
2020-03-25nb/intel/sandybridge: Rewrite table accessorsAngel Pons
2020-03-25drivers/intel/gma/acpi: Add Kconfigs for backlight registersNico Huber
2020-03-25nb/intel/sandybridge: Factor out timing tablesAngel Pons
2020-03-25nb/intel/sandybridge: Use SPDX headersAngel Pons
2020-03-23nb/intel/sandybridge: Use cached CPUIDAngel Pons
2020-03-23nb/intel/sandybridge: Void MRC cache if CPUID differsAngel Pons
2020-03-23nb/intel/sandybridge: Store CPUID in ctrl structAngel Pons
2020-03-23nb/intel/sandybridge: Add warning to saved structsAngel Pons
2020-03-23nb/intel/sandybridge: Remove unnecessary declarationAngel Pons
2020-03-23nb/intel/sandybridge: Do not define tables in a headerAngel Pons
2020-03-23nb/intel/sandybridge: Reflow raminit tablesAngel Pons
2020-03-23acpi: Change Processor ACPI Name (Intel only)Christian Walter
2020-03-23nb/intel/sandybridge: Remove oddball `- 1` in tRFCAngel Pons
2020-03-22nb/intel/sandybridge: Drop spurious register writeAngel Pons
2020-03-20nb/intel/sandybridge: Deduplicate report_memory_configAngel Pons
2020-03-20nb/intel/sandybridge: Always write to PEGCTLAngel Pons
2020-03-19nb/intel/sandybridge: Use loops on DMI register groupsAngel Pons
2020-03-18nb/intel/sandybridge: Tidy up code and commentsAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-03-07src/nb: Use 'print("%s...", __func__)'Elyes HAOUAS
2020-03-06northbridge: Remove unused include <device/pci.h>Elyes HAOUAS
2020-03-02nb/intel/sandybridge: Fix VBOOTPatrick Rudolph
2020-02-24src: capitalize 'RAM'Elyes HAOUAS
2020-02-21nb/intel/snb: Add PCI routing table for PEG root portsJames Ye
2020-02-18nb/intel/sandybridge: Add Xeon E3-1200 (v1) hostbridge PCI IDJonathan A. Kollasch
2020-02-18nb/intel/sandybridge: use list of northbridge device IDsJonathan A. Kollasch
2020-02-12nb/intel/sandybridge/acpi: Fix MMCONF size computationPatrick Rudolph
2020-02-12nb/intel/sandybridge/acpi: Update PEG codePatrick Rudolph
2020-02-01nb/intel/sandybridge: improve indexed register helper macrosFelix Held
2020-01-27nb/intel/sandybridge/raminit_common.h: add missing stdint.h includeFelix Held
2020-01-27nb/intel/sandybridge: replace NORTHBRIDGE with HOST_BRIDGE defineFelix Held
2020-01-16nb/intel/sandybridge: sort LANEBASE_* defines by their addressFelix Held
2020-01-16nb/intel/sandybridge: add macros for byte lane register offsetsFelix Held
2020-01-16nb/intel/sandybridge: refactor code around lane_base[]Felix Held
2020-01-15nb/intel/sandybridge: refactor lane_registers[]Felix Held
2020-01-15nb/intel/sandybridge: drop LyCx(r, x, y) macroFelix Held
2020-01-15nb/intel/sandybridge: Repurpose HOST_BRIDGE macroAngel Pons
2020-01-14intel/sandybridge,bd82x6x: Move enable_smbus() callKyösti Mälkki
2020-01-14nb/intel/sandybridge: Drop 'or zero' instancesAngel Pons
2020-01-11nb/intel/sandybridge: Tidy up raminit codeAngel Pons
2020-01-10nb/intel/{i945,sandybridge}/bootblock.c: Fix typoElyes HAOUAS
2020-01-10nb/intel/sandybridge: Add a bunch of MCHBAR definesAngel Pons
2020-01-09device,sb/intel: Move SMBus host controller prototypesKyösti Mälkki
2020-01-09drivers/pc80/rtc: Separate {get|set}_option() prototypesKyösti Mälkki
2020-01-09nb/intel/sandybridge: Make MCHBAR arithmetics consistentAngel Pons
2020-01-06drivers/pc80/rtc: Swap cmos_write32() parameter orderKyösti Mälkki
2020-01-02src: Remove unneeded 'include <arch/io.h>'Elyes HAOUAS
2020-01-01nb/intel/sandybridge: replace .val_4028 with .io_latencyFelix Held
2020-01-01nb/intel/sandybridge/sandybridge.h: Do cosmetic fixesAngel Pons
2020-01-01nb/intel/sandybridge: Use the MC_BIOS_DATA defineAngel Pons
2020-01-01nb/intel/sandybridge: Make `PM_PDWN_Config` uppercaseAngel Pons
2020-01-01nb/intel/sandybridge: add and use memory thermal configuration registersFelix Held
2020-01-01nb/intel/sandybridge: add and use ME stolen memory and lock bit definesFelix Held
2020-01-01nb/intel/sandybridge: remove unused duplicate PCIEXBAR define X60BARFelix Held
2020-01-01nb/intel/sandybridge: add and use more MCHBAR register definesFelix Held
2020-01-01nb/intel/sandybridge: move MCHBAR register definitions to sandybridge.hFelix Held
2020-01-01nb/intel/sandybridge: use MESEG register names from datasheetFelix Held
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