Age | Commit message (Expand) | Author |
2021-06-16 | nb/intel/haswell/memmap.h: Define MMIO window sizes | Angel Pons |
2021-04-10 | nb/intel: Replace remaining BAR accessors | Angel Pons |
2021-04-10 | nb/intel/haswell: Use new fixed BAR accessors | Angel Pons |
2021-03-28 | nb/intel/haswell: Replace `DMIBAR64` and `EPBAR64` | Angel Pons |
2021-03-10 | nb/intel/haswell: Finalize northbridge in ramstage | Angel Pons |
2021-03-07 | nb/intel/haswell: Indent PCI ops with tabs | Angel Pons |
2021-03-01 | nb/intel/haswell: Fix DPR size handling | Tim Wawrzynczak |
2021-02-24 | nb/intel/haswell/northbridge.c: Correct DPR handling | Angel Pons |
2021-02-18 | nb/intel/haswell: Drop incorrect MMIO_PAVP_MSG write | Angel Pons |
2021-02-16 | nb/intel: Add missing <types.h> | Elyes HAOUAS |
2021-02-16 | nb,soc/intel: Switch to CHROMEOS_RAMOOPS_DYNAMIC | Kyösti Mälkki |
2021-02-16 | nb/intel/sandybridge,haswell: Use chromeos_reserve_ram_oops() | Kyösti Mälkki |
2021-02-12 | nb/intel/haswell: Use common {DMI,EP,MCH}BAR accessors | Angel Pons |
2021-02-05 | intel: Turn `DEFAULT_RCBA` into a Kconfig symbol | Angel Pons |
2021-01-30 | nb/intel/haswell: Define and use MMCONF_BUS_NUMBER | Angel Pons |
2021-01-27 | nb/intel/haswell/haswell.h: Do not include `pch.h` | Angel Pons |
2020-10-31 | {cpu,nb}/intel/haswell: Drop unnecessary `UL` suffix | Angel Pons |
2020-10-24 | nb/intel/haswell: Generalise northbridge chip name | Angel Pons |
2020-10-24 | nb/intel/haswell: Set up Root Complex topology | Angel Pons |
2020-10-15 | nb/intel/haswell: Account for DPR region in memory map | Angel Pons |
2020-08-04 | nb/intel/haswell: Deduplicate PCIEXBAR decoding | Angel Pons |
2020-08-03 | nb/intel/haswell: Add Crystal Well PCI IDs | Iru Cai |
2020-07-31 | nb/intel/haswell: Configure VCs on Egress Port | Angel Pons |
2020-07-28 | nb/intel/haswell: Enable DMI ASPM | Angel Pons |
2020-06-06 | src: Use pci_dev_ops_pci where applicable | Angel Pons |
2020-06-06 | src: Remove unused '#include <cpu/x86/smm.h>' | Elyes HAOUAS |
2020-05-12 | device/pci_device: Extract pci_domain_set_resources from SOC | Raul E Rangel |
2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
2020-05-08 | nb/intel/haswell/northbridge.c: Fix typo | Angel Pons |
2020-05-02 | acpi: Move ACPI table support out of arch/x86 (3/5) | Furquan Shaikh |
2020-04-10 | Replace DEVICE_NOOP with noop_(set|read)_resources | Nico Huber |
2020-04-10 | Drop unnecessary DEVICE_NOOP entries | Nico Huber |
2020-04-05 | src/northbridge: Use SPDX for GPL-2.0-only files | Angel Pons |
2020-04-05 | Drop explicit NULL initializations from `device_operations` | Elyes HAOUAS |
2020-04-02 | Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator` | Nico Huber |
2020-03-17 | src (minus soc and mainboard): Remove copyright notices | Patrick Georgi |
2020-03-15 | nb/intel/haswell: Tidy up code and comments | Angel Pons |
2019-12-19 | src/northbridge: Remove unused <stdlib.h> | Elyes HAOUAS |
2019-12-12 | nb/{haswell,i945,sandybridge}: Drop outdated comment | Elyes HAOUAS |
2019-08-15 | cpu/intel: Replace bsp_init_and_start_aps() | Kyösti Mälkki |
2019-03-21 | {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem() | Subrata Banik |
2019-03-20 | src: Use 'include <string.h>' when appropriate | Elyes HAOUAS |
2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
2019-03-04 | arch/io.h: Drop unnecessary include | Kyösti Mälkki |
2019-01-06 | device: Use pcidev_path_on_root() | Kyösti Mälkki |
2019-01-06 | device: Use pcidev_on_root() | Kyösti Mälkki |
2018-12-29 | nb/intel/haswell: Handle boards that do not support IGD | Tristan Corrick |
2018-12-29 | nb/intel/haswell: Use DEVEN to disable devices | Tristan Corrick |
2018-12-18 | nb/intel/haswell: Add server processor host bridge device ID | Iru Cai |
2018-11-16 | src: Remove unneeded include <cbmem.h> | Elyes HAOUAS |
2018-11-12 | src: Remove unneeded include "{arch,cpu}/cpu.h" | Elyes HAOUAS |
2018-11-02 | nb/intel/haswell: Consolidate memory controller PCI driver structs | Tristan Corrick |
2018-11-01 | sb/intel/lynxpoint: Automatically generate the ACPI PCI routing table | Tristan Corrick |
2018-11-01 | nb/intel/haswell: Add a PCI ID for a desktop memory controller | Tristan Corrick |
2018-09-25 | northbridge: Use 'unsigned int' to bare use of 'unsigned' | Elyes HAOUAS |
2018-06-04 | northbridge/intel: Remove unneeded includes | Elyes HAOUAS |
2018-05-18 | nb/intel/haswell: Get rid of device_t | Elyes HAOUAS |
2018-05-08 | {mb,nb,soc}: Remove references to pci_bus_default_ops() | Nico Huber |
2018-03-08 | nb/intel/haswell;sb/intel/lynxpoint: Enable VT-d and X2APIC | Matt DeVillier |
2018-03-08 | nb/intel/haswell: Generate ACPI DMAR table | Matt DeVillier |
2017-07-03 | northbridge/intel/haswell: Fix undefined behavior | Ryan Salsamendi |
2017-06-27 | nb/intel: add IS_ENABLED() around Kconfig symbol references | Martin Roth |
2017-01-06 | nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h> | Arthur Heymans |
2016-09-12 | src/northbridge: Improve code formatting | Elyes HAOUAS |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2015-03-10 | ACPI: Get S3 resume state from romstage_handoff | Kyösti Mälkki |
2014-11-01 | northbridge/intel: Use DEVICE_NOOP macro over dummy symbol | Edward O'Callaghan |
2014-10-11 | acpi: Remove explicit pointer tracking in per-device ssdt. | Vladimir Serbinenko |
2014-09-22 | haswell: Move to per-device ACPI | Vladimir Serbinenko |
2014-02-16 | haswell: backup the default SMM region on resume | Aaron Durbin |
2014-01-15 | CBMEM intel: Define get_top_of_ram() once per chipset | Kyösti Mälkki |
2013-12-12 | haswell: Export functions for CPU family+model and stepping | Duncan Laurie |
2013-12-07 | haswell: Misc power management setup and fixes | Duncan Laurie |
2013-10-15 | CBMEM: Define cbmem_top() just once for x86 | Kyösti Mälkki |
2013-07-10 | Fix MMCONF_SUPPORT_DEFAULT for ramstage | Kyösti Mälkki |
2013-06-03 | haswell: fix overflow handling TOUUD | Aaron Durbin |
2013-05-01 | boot: remove cbmem_post_handling() | Aaron Durbin |
2013-03-23 | resources: introduce reserved_ram_resource() | Aaron Durbin |
2013-03-22 | haswell: use dynamic cbmem | Aaron Durbin |
2013-03-22 | coreboot: dynamic cbmem requirement | Aaron Durbin |
2013-03-21 | haswell: use s3_resume field in romstage_handoff | Aaron Durbin |
2013-03-21 | haswell: cbmem_get_table_location() implementation | Aaron Durbin |
2013-03-18 | haswell: fix ACPI MCFG table | Aaron Durbin |
2013-03-18 | haswell: enable caching before SMM initialization | Aaron Durbin |
2013-03-17 | haswell: include TSEG region in cacheable memory | Aaron Durbin |
2013-03-16 | haswell: don't add a 0-sized memory range resource | Aaron Durbin |
2013-03-15 | haswell: Fix BDSM and BGSM indicies in memory map | Aaron Durbin |
2013-03-15 | haswell: reserve default SMRAM space | Aaron Durbin |
2013-03-15 | haswell: resource allocation | Aaron Durbin |
2013-03-14 | haswell: Add ULT device IDs | Duncan Laurie |
2013-03-14 | haswell: add PCI id support | Aaron Durbin |
2013-03-14 | haswell: Add initial support for Haswell platforms | Aaron Durbin |