index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
northbridge
/
intel
/
gm45
/
northbridge.c
Age
Commit message (
Expand
)
Author
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2014-11-12
gm45: Don't crash if less than 4G of RAM are present.
Vladimir Serbinenko
2014-11-01
northbridge/intel: Use DEVICE_NOOP macro over dummy symbol
Edward O'Callaghan
2014-10-15
gm45: Convert to per-device ACPI
Vladimir Serbinenko
2014-08-17
gm45: Declare BIOS memory as RAM.
Vladimir Serbinenko
2014-08-16
gm45: Decrease MTRR usage
Vladimir Serbinenko
2014-08-14
gm45: Set acpi_slp_type only once.
Vladimir Serbinenko
2014-08-12
gm45: Move S3 detection to enable stage.
Vladimir Serbinenko
2014-06-18
northbridge/intel: Drop use of set_top_of_ram()
Kyösti Mälkki
2013-09-11
CBMEM northbridges: Remove references to global high_tables_base
Kyösti Mälkki
2013-07-10
Fix MMCONF_SUPPORT_DEFAULT for ramstage
Kyösti Mälkki
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2013-02-28
Drop CONFIG_WRITE_HIGH_TABLES
Stefan Reinauer
2013-02-14
sconfig: rename lapic_cluster -> cpu_cluster
Stefan Reinauer
2013-02-14
sconfig: rename pci_domain -> domain
Stefan Reinauer
2012-11-28
Remove assembly coded log2 function
Ronald G. Minnich
2012-11-27
intel/gm45: new northbridge
Patrick Georgi