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- northbridges are done
- southbridges are done
- Intel CPUs are done, with a design that the board only has to specify
the socket it has, and the CPUs are pulled in automatically. There is
some more cleanup possible in that area, but I'll do that later
- a couple more mainboards compile:
- intel/eagleheights
- intel/jarrell
- intel/mtarvon
- intel/truxton
- intel/xe7501devkit
- sunw/ultra40
- supermicro/h8dme
- tyan/s2850
- tyan/s2875
- via/epia
- via/epia-cn
- via/epia-m
- via/epia-m700
- via/epia-n
- via/pc2500e
(PPC not considered, probably overlooked something)
All of them only _build_, but some options are probably completely
wrong. To be fixed later
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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It's only three files. Also fix up all the paths (Gotta love included C files)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4661 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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lib/debug.c and use that one.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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code to use it. That makes the code more readable and also less
error-prone.
Abuild tested.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2670 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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broke and stopped FILO
from being able to boot.
The fix is a simple one line change plus a comment to
src/mainboard/via/epia/auto.c to write to the IDE
configuration register 0x42 . This has always been done here, however
at some point
something broke it.
The same register was also being set correctly in ide_init(), however
for some reason
this does not work. Possibly the register needs to be set before the IDE
peripheral is enabled
or maybe it is a timing issue.
The section of code in ide_init() (
src/southbridge/via/vt8231/vt8231_ide.c ) that does
write to register 0x42 has been commented out as it is superfluous
and I have added a comment to indicate the reason, should someone at a
future date wonder
why.
I have also changed the default COM speed from 19200 to 115200 in
src/mainboard/via/epia/Options.lb
There has been mention before about the EPIA board not being able to use
115200 but I have seen
no such problems with my board.
Signed-off-by: Ben Hewson <ben@hewson-venieri.com>
This patch worked for me and allowed me to boot Debian kernel
2.5.16-4-486 on an epia 800 mhz system. It is able to consistently get
through the initialization and start init now.
However, after that it crashes at various points in the boot process.
Acked-by: Alex Mauer <hawke@hawkesnest.net>
Note from comitter: I am commiting this, although:
1. it's not the exact right way to fix it up, the chip.h for the sb
should change
2. Alex reports problems, which are almost certainly memory issues.
But it is as close as we've gotten. I can't test it.
Ron Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2633 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Creator: Li-Ta Lo <ollie@lanl.gov>
More Via EPIA
more via epia stuff, including the trival but fatal bug in auto.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1978 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Creator: Li-Ta Lo <ollie@lanl.gov>
emulator update
x96emu update from Paulo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Creator: Li-Ta Lo <ollie@lanl.gov>
emulator update
Correction to the reduce emulator from Paulo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
enabled. All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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New Files :-
src/cpu/via/model_centaur/Config.lb
src/cpu/via/model_centaur/model_centaur_init.c
Updated Files :-
src/arch/i386/include/arch/smp/mpspec.h
- make write_smp_table a define for non smp systems
src/cpu/x86/lapic/lapic_cpu_init.c
- change possible typo
src/mainboard/via/epia/Config.lb
src/mainboard/via/epia/Options.lb
src/mainboard/via/epia/auto.c
src/mainboard/via/epia/chip.h
src/mainboard/via/epia/failover.c
- updated after recent code changes
src/northbridge/via/vt8601/chip.h
src/northbridge/via/vt8601/northbridge.c
src/northbridge/via/vt8601/raminit.c
- corrections after recent code changes to allow compiling
src/southbridge/via/vt8231/chip.h
src/southbridge/via/vt8231/vt8231.c
- initial pass to allow compiling after recent code changes.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1726 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1155 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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But nothing is getting set into the north bridge.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1154 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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ron
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1153 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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more via fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1144 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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