| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-11-01 | soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi | Subrata Banik |
| 2019-08-26 | soc/intel: Use common romstage code | Kyösti Mälkki |
| 2019-08-18 | cpu/intel: Enter romstage without BIST | Kyösti Mälkki |
| 2019-07-13 | intel/haswell: Replace monotonic timer | Kyösti Mälkki |
| 2019-04-25 | mb/supermicro/x10slm-f: Do SIO setup in bootblock | Tristan Corrick |
| 2019-04-19 | src/mb/Kconfig: Fix PCI subsystem IDs | Elyes HAOUAS |
| 2019-03-06 | Remove DEFAULT_PCIEXBAR alias | Kyösti Mälkki |
| 2019-03-04 | device/pnp: Add header files for PNP ops | Kyösti Mälkki |
| 2019-01-25 | mb/{kontron,supermicro}: Use pcidev_on_root() | Elyes HAOUAS |
| 2018-12-29 | mainboard: Add Supermicro X10SLM+-F | Tristan Corrick |
 |
index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |