coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2018-12-03	mb/sifive/hifive-unleashed: Use if (IS_ENABLED(...))	Jonathan Neuschäfer
	"if" is preferable over "#if", because it lets the compiler perform syntax and type checks even if CONFIG_CONSOLE_SERIAL is disabled. Change-Id: I45a763f2d854fbe9082795bc74de7a9d0fded3c9 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/29336 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Hug <philipp@hug.cx> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-11-28	mb///Kconfig: Remove useless comment	Elyes HAOUAS
	Change-Id: Ibdff50761a205d936b0ebe067f418be0a2051798 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/29871 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hellsenberg <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: David Guckian Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2018-10-22	mainboard/: Select MISSING_BOARD_RESET appropriately	Nico Huber
	We didn't have a hard_reset() implementation for these boards. So select the board_reset() stub for them. Change-Id: I77651e3844632fb1a347008c96e53d23cc5a2646 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29170 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-15	sifive/hifive-unleashed: enable CBMEM support	Philipp Hug
	Change-Id: I3eacba9c1c20bbfa270dd7a9afabe48ed9092bcc Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/28622 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-15	soc/sifive: move ram_resource to mainboard	Philipp Hug
	ram_resource is board specific and should be moved there. Change-Id: I50bd9aaaae39422e565d8bf205a6365c59299df0 Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/28621 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2018-09-14	soc/sifive/fu540: Initialize SDRAM	Philipp Hug
	Based on SiFive bootloader code Change-Id: I71043ce9e458e25e64da28d53cd36b02d2e22acc Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/28604 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-14	soc/sifive/fu540: Switch clock to 1GHz in romstage	Philipp Hug
	Invoke clock_init in romstage for SiFive Unleashed. Change-Id: Ib869762d557e8fdf4c83a53698102df116d80389 Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/28602 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2018-06-02	src/mainboard: Add and update license headers	Martin Roth
	This change adds and updates headers in all of the mainboard files that had missing or unrecognized headers. After this goes in, we can turn on lint checking for headers in all mainboard directories. Change-Id: Ibe038a8f7468253b21fd2ac90c045d0c9cc89dfc Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/26568 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-08	mb/sifive: Get rid of device_t	Elyes HAOUAS
	Use of device_t has been abandoned in ramstage. Change-Id: I8c6358d072b25ab4758637da989883daa600c8ee Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2018-04-26	mb/sifive: Add HiFive Unleashed mainboard	Jonathan Neuschäfer
	Change-Id: I52ef2da9148809923c90178a00ba94babba8d2f8 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/25790 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>