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path: root/src/mainboard/siemens
AgeCommit message (Expand)Author
2022-10-22mb/siemens/mc_ehl: Add FIVR config to devicetree for all variantsWerner Zeh
2022-10-22mb/siemens/mc_apl*: Enable early PCI bridge before FSP-MAngel Pons
2022-10-07mb/siemens/mc_ehl2: Use preset driver strength for SD-CardMario Scheithauer
2022-09-22mb/siemens/mc_apl7: Enable libgfxinit for the boardJan Samek
2022-09-22mb/siemens/mc_apl7/Kconfig: Enable PTN3460 early initJan Samek
2022-09-19mb/siemens/mc_apl1: Do not wait for legacy devices on mc_apl7Werner Zeh
2022-09-07mb/siemens/mc_ehl2: Limit SD-Card speed modes to DDR50Werner Zeh
2022-09-07mb/siemens/mc_ehl2: Set I2C bus 1 speed to 100 kHzWerner Zeh
2022-09-07mb/siemens/mc_ehl2: Change to new RTC RV3028-C7Werner Zeh
2022-09-07mb/siemens/mc_ehl: Move RTC Kconfig option to variant levelWerner Zeh
2022-08-16mb/**/dsdt.asl: Drop misleading "OEM revision" commentAngel Pons
2022-08-16mb/**/dsdt.asl: Drop superfluous commentsAngel Pons
2022-06-27mb/siemens/mc_apl7: Disable VBOOT and TPMUwe Poeche
2022-06-23mb/siemens/mc_apl1: Add new mainboard variant mc_apl7Uwe Poeche
2022-06-20soc/intel/apollolake: Hook Up SataPortEnable to devicetreeSean Rhodes
2022-05-26soc/intel/cannonlake: Hook up FSP hyper-threading setting to option APIFelix Singer
2022-05-23mb/siemens/mc_ehl: Disable RAPLUwe Poeche
2022-05-21mb/siemens/mc_ehl2: Invert PHY IRQ from falling edge to rising edgeMario Scheithauer
2022-05-20mb/siemens/mc_ehl2: Quick fix for PSE TSN phy interface typeLean Sheng Tan
2022-05-18intel/common/block: Provide RAPL and min clock ratio switches in commonUwe Poeche
2022-05-17mainboard/**/devicetree.cb: Fix typoAngel Pons
2022-05-17soc/intel/elkhartlake: Enable SMBus depending on dev stateAngel Pons
2022-05-17mb/siemens/mc_ehl2: Disable PCI clock outputs on XIO bridgeMario Scheithauer
2022-05-16mb/siemens/mc_ehl2: Enable TSN GbE driverMario Scheithauer
2022-05-16mb/siemens/mc_ehl2: Set PCH TSN link speed to 1 Gbps in devicetreeMario Scheithauer
2022-05-16mb/siemens/mc_ehl2: Adjust PSE TSN settings in devicetreeMario Scheithauer
2022-04-21tpm: Refactor TPM Kconfig dimensionsJes B. Klinke
2022-03-14mb/siemens/mc_ehl: Increase SPD buffer size to 512 bytesWerner Zeh
2022-03-07src: Make PCI ID define names shorterFelix Singer
2022-03-02mb/siemens/mc_ehl: Disable HS400 mode for eMMCWerner Zeh
2022-02-22mb/siemens/mc_apl2: Enable PCI device for I2C bus 0Werner Zeh
2022-02-12mb/siemens/mc_apl{2,4,5,6}: Enable recovery MRC cacheWerner Zeh
2022-02-03mb/siemens/mc_ehl2: Disable PCIe RPsMario Scheithauer
2022-02-03mb/siemens/mc_ehl2: Disable SATAMario Scheithauer
2022-02-01mb/siemens/{mc_apl1,...,mc_apl6}: Disable SATA ALPM supportMario Scheithauer
2022-01-25mb/siemens/mc_ehl: Prevent reset when TCO expiresWerner Zeh
2022-01-21soc/intel/ehl: Replace dt `HeciEnabled` by `HECI1 disable` configSubrata Banik
2022-01-10src/mainboard/{siemens,starlabs}: Remove unused <console/console.h>Elyes HAOUAS
2021-12-23mb: Add space before closing comment block keywordPaul Menzel
2021-12-18mb/siemens/chili: Reuse options from Kconfig.nameFelix Singer
2021-12-10mb/siemens/mc_ehl: Enable TPM in bootblockWerner Zeh
2021-11-17mb/siemens/mc_ehl1: Send POST codes to NC FPGA via PCIWerner Zeh
2021-11-15mb/siemens/mc_ehl2: Adjust PCIe clock source settings in devicetreeMario Scheithauer
2021-11-15mb/siemens/mc_ehl: Disable HECI #2 deviceMario Scheithauer
2021-11-04treewide: Replace bad uses of `find_resource`Angel Pons
2021-11-04mb/siemens/mc_ehl: Disable PMC low power modesWerner Zeh
2021-11-04mb/siemens/mc_ehl: Disable all P-StatesWerner Zeh
2021-11-04mb/siemens/mc_ehl: Disable C-States for CPU and packageWerner Zeh
2021-11-04mb/siemens/mc_ehl2: Clean up devicetreeMario Scheithauer
2021-11-04mb/siemens/mc_ehl: Enable Row-Hammer preventionMario Scheithauer
2021-11-04mb/siemens/mc_ehl2: Configure SD card detect pin in devicetreeMario Scheithauer
2021-11-04mb/siemens/mc_ehl2: Clean up PCIe root port settings in devicetreeMario Scheithauer
2021-11-04mb/siemens/mc_ehl2: Adjust PCIe clock settings in devicetreeMario Scheithauer
2021-11-03mb/siemens/mc_ehl1: Adjust PCIe clock settings in devicetreeWerner Zeh
2021-11-02mb/siemens/mc_ehl1: Clean up PCIe root port settings in devicetreeWerner Zeh
2021-11-02mb/siemens/mc_ehl1: Clean up devicetreeWerner Zeh
2021-10-27mb/siemens/chili: Drop redundant Kconfig selectAngel Pons
2021-10-14mb/siemens/mc_ehl2: Adjust PCH serial IO settingsMario Scheithauer
2021-10-14mb/siemens/mc_ehl2: Adjust USB settingsMario Scheithauer
2021-10-14mb/siemens/mc_ehl2: Enable PCI devicesMario Scheithauer
2021-10-14mb/siemens/mc_ehl2: Set coreboot ready LEDMario Scheithauer
2021-10-12mb/siemens/mc_ehl: Remove unneeded 'half_populated' variableWerner Zeh
2021-10-12mb/siemens/mc_ehl: Use SPD data from HW-Info in the first placeWerner Zeh
2021-10-11mb/siemens/mc_ehl2: Adjust Legacy IRQ routing for PCI devicesMario Scheithauer
2021-10-11mb/siemens/mc_ehl: Add variant_mainboard_final()Mario Scheithauer
2021-10-11mb/siemens/mc_ehl2: Enable LPC ComBMario Scheithauer
2021-10-11mb/siemens/mc_ehl2: Disable INTEL_LPSS_UART_FOR_CONSOLEMario Scheithauer
2021-10-11mb/siemens/mc_ehl2: Adjust GPIOsMario Scheithauer
2021-10-11mb/siemens/mc_ehl2: Disable SATA Port 0Mario Scheithauer
2021-10-11mb/siemens/mc_ehl2: Enable SD-CardMario Scheithauer
2021-10-11mb/siemens/mc_ehl2: Move RTC RX6110SA from SMBus to I2C2Mario Scheithauer
2021-10-11mb/siemens/mc_ehl2: Update SPD for DDR4 devicesMario Scheithauer
2021-10-01mb/siemens/mc_ehl: Move UART_FOR_CONSOLE switch to variant levelWerner Zeh
2021-10-01mb/siemens/mc_ehl: Add a new variant mc_ehl2Werner Zeh
2021-10-01mb/siemens/mc_ehl1: Enable LPSS UARTWerner Zeh
2021-09-03src/*: Specify type of `DIMM_SPD_SIZE` onceAngel Pons
2021-08-28soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by defaultFelix Singer
2021-08-13mb/{kontron/bsl6,siemens/chili}: Add `inhibit_flashlock` nvram optionNico Huber
2021-08-02mb/siemens/mc_ehl: Enable master bit in PCI config space if allowedWerner Zeh
2021-08-02mb/siemens/mc_ehl: Add code to wait for legacy devices before PCI scanWerner Zeh
2021-07-29mb/siemens/mc_ehl1: Disable LTR for all PCIe root portsWerner Zeh
2021-07-29mb/siemens/mc_ehl1: Disable L1 substates for PCIe root portsWerner Zeh
2021-07-29mb/siemens/mc_ehl1: Enable Intel I210 MACPHY driverWerner Zeh
2021-07-29mb/siemens/mc_ehl: Enable Siemens NC-FPGA driverWerner Zeh
2021-07-29mb/siemens/mc_ehl: Enable SIEMENS_HWILIBWerner Zeh
2021-07-29mb/siemens/mc_ehl1: Enable In Band ECCWerner Zeh
2021-07-29mb/siemens/mc_ehl1: Disable System Agent dynamic frequency supportWerner Zeh
2021-07-29mb/siemens/mc_ehl: Enable measured bootWerner Zeh
2021-07-29mb/siemens/mc_ehl: Enable LPC TPMWerner Zeh
2021-07-29mb/siemens/mc_ehl: Add external RTC RX6110SAWerner Zeh
2021-07-26mb/*: Specify type of `VARIANT_DIR` onceAngel Pons
2021-07-26mb/*: Specify type of `FMDFILE` onceAngel Pons
2021-07-26mb/*: Specify type of `DEVICETREE` onceAngel Pons
2021-07-26mb/*: Specify type of `MAINBOARD_PART_NUMBER` onceAngel Pons
2021-07-26mb/*: Specify type of `MAINBOARD_DIR` onceAngel Pons
2021-07-26src/*: Specify type of `CBFS_SIZE` onceAngel Pons
2021-07-23mb/siemens/mc_ehl1: Add GPIO configurationWerner Zeh
2021-07-23mb/siemens/mc_ehl1: Remove SD-Card card detect GPIO in devicetreeWerner Zeh
2021-07-23mb/siemens/mc_apl{1,2,3,5,6}: Use PCI_ALLOW_BUS_MASTER_ANY_DEVICEWerner Zeh
2021-07-22mb/siemens/mc_ehl1: Disable GSPI in devicetreeWerner Zeh
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 18:57:40 +0000