| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-04-26 | siemens/mc_apl1: Provide baseboard and variant concepts | Mario Scheithauer |
| 2017-11-07 | siemens/mc_apl1: Select CONFIG_NC_FPGA_NOTIFY_CB_READY | Mario Scheithauer |
| 2017-07-27 | siemens/mc_apl1: Select skip RAPL configuration | Mario Scheithauer |
| 2017-06-13 | siemens/mc_apl1: Use Siemens NC FPGA driver | Mario Scheithauer |
| 2017-05-17 | siemens/mc_apl1: Select external 8250 UART | Mario Scheithauer |
| 2017-05-11 | siemens/mc_apl1: Add usage of external RTC RX6110 SA | Mario Scheithauer |
| 2017-03-15 | siemens/mc_apl1: Clean up the code | Mario Scheithauer |
| 2017-02-20 | siemens/mc_apl1: Set MAC address for all available i210 MACs | Mario Scheithauer |
| 2017-02-02 | siemens/mc_apl1: Add new mainboard | Mario Scheithauer |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |