coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-12-01	nb/intel/gm45: Hook up PCI domain and CPU bus ops to devicetree	Arthur Heymans
2022-11-13	drivers/generic/ioapic: Drop poor implementation	Kyösti Mälkki
2021-10-17	drivers/generic/ioapic: Drop enable_virtual_wire	Kyösti Mälkki
2021-06-16	arch/x86/ioapic: Drop irq_on_fsb as a configurable item	Kyösti Mälkki
2020-03-29	drivers/intel/gma/acpi: Provide default definition for displays	Nico Huber
2019-10-14	sb/intel/i82801ix: Add common code to set up LPC IO decode ranges	Arthur Heymans
2019-01-24	mb///devicetree.cb: Move the ioapic device under the LPC bridge	Arthur Heymans
2016-06-12	nb/intel/raminit (native): Read PCI mmio size from devicetree	Patrick Rudolph
2015-05-28	igd.asl rewrite	Vladimir Serbinenko
2015-02-15	x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer	Kevin Paul Herbert
2014-07-30	i82801ix: Allow configuration of SATA mode in CMOS.	Vladimir Serbinenko
2013-02-14	sconfig: rename lapic_cluster -> cpu_cluster	Stefan Reinauer
2013-02-14	sconfig: rename pci_domain -> domain	Stefan Reinauer
2012-11-27	roda/rk9: New mainboard	Patrick Georgi