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path: root/src/mainboard/intel/xe7501devkit/Kconfig
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2014-12-18Drop Intel E7520 and E7525 and related boardsStefan Reinauer
There is no Cache As Ram for these boards, let's get rid of them. Also drop unused dependencies Change-Id: I94782da521c32ade7891ada29d3013cbab32a48b Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/7836 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-05-03Move ARCH_* from board/Kconfig to cpu or soc Kconfig.Furquan Shaikh
CONFIG_ARCH is a property of the cpu or soc rather than a property of the board. Hence, move ARCH_* from every single board to respective cpu or soc Kconfigs. Also update abuild to ignore ARCH_ from mainboards. Change-Id: I6ec1206de5a20601c32d001a384a47f46e6ce479 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: http://review.coreboot.org/5570 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2012-11-16Drop Kconfig variable BOARD_HAS_HARD_RESETStefan Reinauer
hard_reset was indeed consolidated and moved into the southbridge code a while ago, but the config variable was still kept alife, with some duplicate code. Change-Id: I60d4a87de916667f6e89353dfbe1a7b9eca380f7 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1837 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-05-01Drop CONFIG_MAX_PHYSICAL_CPUS on non-AMD boardsStefan Reinauer
CONFIG_MAX_PHYSICAL_CPUS is defined by quite a number of mainboards whithout any code actually using the variable. Hence, drop MAX_PHYSICAL_CPUS from Kconfig for those boards. In the long run we should drop CONFIG_MAX_PHYSICAL_CPUS use completely and make the code dynamic or depend on CONFIG_MAX_CPUS instead. Change-Id: I37dcc74d245ddba5186b96bd82220dacb6f4d323 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/984 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-02-17intel/i82801cx: Move HAVE_HARD_RESET to southbridgePatrick Georgi
No in-tree board using that chipset has it not selected, so move selection from boards to southbridge. Change-Id: Ifba0b65d81af60774f368d151e935ae1cc768336 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/662 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2011-03-01Use subsystem id from devicetree.cb instead of Kconfig and moveSven Schnelle
all boards to the new config scheme. Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6421 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-30Restructured all vendors' Kconfig files to no longer source the boards'Jens Rottmann
Kconfigs from within the choice/endchoice block. This makes it possible to define user visible board specific options. Moved all vendor names and PCI ids to the vendors' Kconfigs. Now all options in each file depend on the same symbol, so replaced all "depends on"s with a single "if". Sorted boards (sort -d), cleaned whitespace. This patch also introduces a dummy option BOARD_SPECIFIC_OPTIONS, which is always "y" and never used. It it simply needed to have something to attach the boards' "select" statements to. Signed-off-by: Jens Rottmann <JRottmann@LiPPERTEmbedded.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5754 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-06Re-integrate "USE_OPTION_TABLE" code.Edwin Beasant
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com> Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-29This patch drops the coreboot CMOS checksum ranges from Kconfig becauseStefan Reinauer
the information is already specified in cmos.layout. coreboot is changed to use that version instead. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmai.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5313 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-27- make HAVE_HARD_RESET match what newconfig didPatrick Georgi
- introduce BOARD_HAS_HARD_RESET and use it if a board provides hard_reset in $(MAINBOARDDIR)/reset.c, instead of some chipset component - move a couple of rules out of the mainboards' Makefiles into src/arch/i386/Makefile.inc: initobj-y += crt0.o obj-y += mainboard.o obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o obj-$(CONFIG_BOARD_HAS_HARD_RESET) += reset.o - remove Makefile.incs that are empty (or comment-only) after these changes, incl. Makefile.romccboard.inc (and references to it) - Make include not fail if Makefile.inc doesn't exist. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5168 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-27This does the following:Stefan Reinauer
cd coreboot/src/southbridge svn mv i82801ca i82801cx svn mv i82801dbm i82801dx svn mv i82801er i82801ex svn copy i82801xx i82801bx svn mv i82801xx i82801ax Plus, fixing up the filenames in these directories and the romstage.c and Kconfig files of the mainboards using those drivers. Plus, switching the thomson ip1000 and rca rm4100 to the i82801dx driver. There's a lot more to be done, like - adding device IDs for the ICH3 and newer drivers that have been kept in i82801xx so far - drop the additional parts support from the ax and bx drivers. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5167 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-09Move all the copies of the romstage.inc rule toPatrick Georgi
src/arch/i386/Makefile.inc For that to work, I had to: - Add a CONFIG_ROMCC variable - Set that variable on all ROMCC boards - conditionally choose romcc or gcc rule based on that variable - remove those two rules from all the boards' Makefiles - switch a couple of boards to HAVE_OPTION_TABLE, as they actually have. Also remove the duplication of rules with the sole difference of if they depend on option_table.h or not. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-27Make newconfig and kconfig agree on MAINBOARD_PCI_SUBSYSTEM_{VENDOR,DEVICE}_IDPatrick Georgi
Usually, this means adding values to Kconfig, but in a few cases, adding values to newconfig, too (which doesn't hurt). Also really hook up tyan/s2850 and tyan/s2875 to kconfig, and have them still build. Trivial and stupid kconfig changes, just lots of them. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4959 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-20Fix all board names in Kconfig as per wiki / vendor website.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4815 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16Set default ROM sizes per-board to match the ROM chip that cameUwe Hermann
with the respective board. Of course, the user can still override the size in menuconfig. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4790 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-15Add CONFIG_GENERATE_* for tables so that the user can select which tables notMyles Watson
to build, but by default all the tables that are available are built. Make PIRQ table build for qemu. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-11HAVE_ACPI_TABLES cleanups for kconfig:Uwe Hermann
- Add "select HAVE_ACPI_TABLES" for boards which need it. - Drop sections which set HAVE_ACPI_TABLES to 'n', that's the default. - Convert sections which set HAVE_ACPI_TABLES to 'y' to the shorter "select HAVE_ACPI_TABLES". Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4759 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-07Convert all "default y" options to "select FOO" (shorter).Uwe Hermann
Also, drop per-board CONSOLE_VGA/PCI_ROM_RUN while I'm at it, they're global options in kconfig. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4735 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-07Fix intel board build on kconfig. MAX_CPUS was missingPatrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4733 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-03Remove duplicate and not too useful Kconfig board comments asUwe Hermann
per discussion on the mailing list. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-29Fix a number of board names in Kconfig (trivial).Uwe Hermann
Also, simplify the M2V-MX SE Kconfig file a bit while I'm at it. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4688 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-25some progress on kconfig:Patrick Georgi
- northbridges are done - southbridges are done - Intel CPUs are done, with a design that the board only has to specify the socket it has, and the CPUs are pulled in automatically. There is some more cleanup possible in that area, but I'll do that later - a couple more mainboards compile: - intel/eagleheights - intel/jarrell - intel/mtarvon - intel/truxton - intel/xe7501devkit - sunw/ultra40 - supermicro/h8dme - tyan/s2850 - tyan/s2875 - via/epia - via/epia-cn - via/epia-m - via/epia-m700 - via/epia-n - via/pc2500e (PPC not considered, probably overlooked something) All of them only _build_, but some options are probably completely wrong. To be fixed later Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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