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path: root/src/mainboard/intel/adlrvp
AgeCommit message (Expand)Author
2021-08-13mb/intel/adlrvp: Update DIMM type as memory down for DDR5 MR SKUMeera Ravindranath
2021-08-13mb/intel/adlrvp: Rename spd_info struct based on memory topologyMeera Ravindranath
2021-08-13mb/intel/adlrvp: Use HDA TMODE 8T to match spec for ADL P RVPSathya Prakash M R
2021-08-10mb/intel/adlrvp: create dynamic power limits mechanism for thermalSumeet Pawnikar
2021-08-10mb/*/{brya,adlrvp}: move cpu_cluster static configuration to chipset.cbMAULIK V VAGHELA
2021-08-10mb/*/brya/adlrvp: Remove hardcoding of BSP APIC IDMAULIK V VAGHELA
2021-08-09mb/intel/adlrvp: Support VBT binaries for LP4 and LP5Bernardo Perez Priego
2021-08-05mb/intel/adlrvp: Add probed fw_configs to SMBIOS OEM stringsAnil Kumar
2021-08-05mb/intel/adlrvp_m: Enable SaGv supportBora Guvendik
2021-07-26mb/*: Specify type of `VARIANT_DIR` onceAngel Pons
2021-07-26mb/*: Specify type of `OVERRIDE_DEVICETREE` onceAngel Pons
2021-07-26mb/*: Specify type of `DEVICETREE` onceAngel Pons
2021-07-26mb/*: Specify type of `MAINBOARD_PART_NUMBER` onceAngel Pons
2021-07-26mb/*: Specify type of `MAINBOARD_DIR` onceAngel Pons
2021-07-21mb/intel/adlrvp: Enable I2S audio codecs on ADL-M RVPAnil Kumar
2021-07-19mb/{google, intel}: Make use of `cpu/intel/cpu_ids.h'Subrata Banik
2021-07-17mb/intel/adlrvp: Update PMC Descriptor for Alder lake A0(906a0h) siliconSridhar Siricilla
2021-07-15mb/intel/adlrvp: Disable xDCI in devicetreeMonika A
2021-07-12mb/intel/adlrvp_m: Enable EC software syncThejaswani Putta
2021-07-05mb/intel/adlrvp_m: Remove ASL code and enable dynamic SSDT creation for camer...Varshit B Pandya
2021-07-05mb/intel/adlrvp: Remove ASL code and enable dynamic SSDT creation for camera ...Varshit B Pandya
2021-07-05mb/intel/adlrvp: Update the FIVR configurationsV Sowmya
2021-06-28mb/intel/adlrvp_m: Enable TCSS USB ports device pathBernardo Perez Priego
2021-06-24soc/intel/alderlake: Update mainboard_memory_init_params() argumentSubrata Banik
2021-06-22mb/intel/adlrvp: Update Mainboard part number and VendorMeera Ravindranath
2021-06-17mb/intel/adlrvp_m: Remove DP_HPD 1 & 2 definition from devicetreeBernardo Perez Priego
2021-06-17mb/intel/adlrvp_m: Configure DP_HPD as PAD_NC and disable DdiPortHpdBernardo Perez Priego
2021-06-16soc/intel/alderlake/romstage: Update display UPDs based on InternalGfxSubrata Banik
2021-06-14mb/intel/adlrvp: Add board id for MR DDR5 SKUDeepti Deshatty
2021-06-07soc/intel/adl: Add SKU specific power limits supportSumeet Pawnikar
2021-06-05mb/intel/adlrvp: Use device aliasesSubrata Banik
2021-06-05mb/intel/{adlrvp, sm}: Remove ADL-S devices from ADL-P/M devicetree.cbSubrata Banik
2021-06-01mb/intel/adlrvp_m: Enable LTR for PCIEBernardo Perez Priego
2021-05-30mb/intel/adlrvp_m: add ec device entry to devicetreeBora Guvendik
2021-05-28mb/intel/adlrvp_m: Disable unused TBT ports from device treeBernardo Perez Priego
2021-05-18mb/intel/adlrvp: Disable EC sync for adlrvp_ext_ecMaulik V Vaghela
2021-05-12mb/intel/adlrvp_m: Program CPU PCIE RP GPIOs in early GPIOBora Guvendik
2021-05-12mb/intel/adlrvp: Fill CmdMirror and DqDqsRetraining for ADLRVPMaulik V Vaghela
2021-05-07mb/intel/adlrvp: Program CPU PCIE RP GPIOs in early GPIOMaulik V Vaghela
2021-05-06mb/intel/adlrvp_m: Disable Type-C xDCIBernardo Perez Priego
2021-05-05mb/intel/adlrvp: Enable support for Chrome OS mode switchesAnil Kumar
2021-05-03mb/intel/adlrvp: Increase RO/RW region size in chromeos.fmdMaulik V Vaghela
2021-04-29mb/intel/adlrvp: Configure TCSS, BT and WiFi related GPIOsFrancois Toguo
2021-04-28mb/intel/adlrvp_m: Add UART0 GPIO config for ADL-M RVPAnil Kumar
2021-04-23mb/intel/adlrvp: Enable DPTF functionality for adlrvp boardSumeet R Pawnikar
2021-04-23mb/intel/adlrvp_m: Enable bluetoothBora Guvendik
2021-04-22soc/intel/alderlake: Add enum for HDA audio configurationSugnan Prabhu S
2021-04-22soc/intel/alderlake and mb: Drop PchHdaAudioLink*Enable UPDs from chip.hFurquan Shaikh
2021-04-21soc/intel/alderlake: Drop unused `PrmrrSize` from devicetreeAngel Pons
2021-04-16mb/intel/adlrvp: Enable ALC711 over SNDW0Sridhar Siricilla
2021-04-12mb/*: drop LPC generic range for port 80Michael Niewöhner
2021-04-09mb/intel/adlrvp: Enable HECI1 communicationSridhar Siricilla
2021-04-06mb/intel/adlrvp: Update iDisp Link UPD settingsFrancois Toguo
2021-04-06mb/intel/adlrvp: Enable Camera in ADL-M RVPVarshit Pandya
2021-04-02mb/intel/adlrvp: Update VBT filenamesTim Wawrzynczak
2021-03-28mb/intel/adlrvp_m: Enable ADL-M RVP LP5 memory configurationMaulik V Vaghela
2021-03-28mb/intel/adlrvp_m: Enable ADL_M RVP LP4 memory configurationMaulik V Vaghela
2021-03-28mb/intel/adlrvp: Configure GPIOs for ADLRVP-MVarshit Pandya
2021-03-28mb/intel/adlrvp: Enable CSE Lite SKUSridhar Siricilla
2021-03-27mb/intel/adlrvp: Allow GPIO PM override to disable dynamic GPIO PMSubrata Banik
2021-03-26mb/intel/adlrvp: Remove static VBT stitchingMaulik V Vaghela
2021-03-26soc/intel/alderlake: Add provision to override Rcomp settingsSubrata Banik
2021-03-26soc/intel/alderlake: Align RcompResistor definition as per MRCSubrata Banik
2021-03-24mb/intel/adlrvp: Enable CnviBtAudioOffloadUsha P
2021-03-15mb/intel/adlrvp: Disable non-existing BT PCI interface and add BT flagCliff Huang
2021-03-15mb/intel/adlrvp_p: Support VBT for LP4, LP5 and DDR5 SKUsMeera Ravindranath
2021-03-15mb/intel/adlrvp: Select ADL_ENABLE_USB4_PCIE_RESOURCESTim Wawrzynczak
2021-03-12mb/intel/adlrvp: do UART pad config at board-levelMichael Niewöhner
2021-03-03mb/*/*: Don't select PCIEXP_HOTPLUGArthur Heymans
2021-02-27vboot: update GBB flags to use altfw terminologyJoel Kitching
2021-02-24mb/intel/adlrvp_m: Add initial code for adl-m variant boardVarshit Pandya
2021-02-22mb/intel/adlrvp: Add support for LP5 SKU with boardid 0x17Subrata Banik
2021-02-17mb/intel/adlrvp: Fix incorrect SPD address issue on DDR4/DDR5Subrata Banik
2021-02-17mb/intel/adlrvp: Early program SMBUS CLOCK and DATASubrata Banik
2021-02-16mb/{intel,prodrive,protectli}: Remove unused <string.h>Elyes HAOUAS
2021-02-11src: Remove unused <arch/cpu.h>Elyes HAOUAS
2021-02-10mb/intel/adlrvp/bootblock.c: Remove unused includesElyes HAOUAS
2021-02-05soc/intel/alderlake: Refactor PCIE port configEric Lai
2021-02-04src: Remove unused <cbfs.h>Elyes HAOUAS
2021-02-04mainboards: Remove default CHROMEOS=yKyösti Mälkki
2021-02-01soc/intel/alderlake: Create separate Kconfig for CLKSRC and CLKREQSubrata Banik
2021-01-30mb/intel/adlrvp: Remove unnecessary whitespaceSubrata Banik
2021-01-28mb/intel/adlrvp: Configure SATA DEVSLP as per latest schematicsSubrata Banik
2021-01-28ACPI: Move include for <vc/google/chromeos.asl>Kyösti Mälkki
2021-01-28mb/intel/adlrvp: Remove ClkReq assignment for RP8Subrata Banik
2021-01-27ACPI: Add top-level ASLKyösti Mälkki
2021-01-25soc/intel/adl and mb/intel/adlrvp: Use the newly added meminit block driverFurquan Shaikh
2021-01-24arch/x86: Use wildcard for mb/smihandler.cKyösti Mälkki
2021-01-21mb/intel/adlrvp: Add PRESERVE to UNIFIED_MRC_CACHESubrata Banik
2021-01-21mb/intel/adlrvp: Remove redundant HAS_RECOVERY_MRC_CACHE KconfigSubrata Banik
2021-01-10mb/intel/adlrvp: Update GPIOs as per latest schematicsSubrata Banik
2021-01-10mb/intel/adlrvp: Fix FW download failed for PEG 060, 010Subrata Banik
2021-01-10soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPsSubrata Banik
2021-01-07mb/intel/adlrvp: Fix building with CONFIG_CHROMEOS unsetMatt DeVillier
2020-12-23mb/intel/adlrvp: Make SI_ALL region within 16MiBSubrata Banik
2020-12-17mb/intel/adlrvp: Enable PCIEXP_HOTPLUG for TCSS TBT/USB4 portsV Sowmya
2020-12-12mb/intel/adlrvp: Make CLKSRC and CLKREQ proper for PCIE RP8Subrata Banik
2020-12-09mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2V Sowmya
2020-12-07mb/intel/adlrvp: Remove GPP_E0Meera Ravindranath
2020-12-02mb/intel/adlrvp: Replace tab by white space in devicetreeMeera Ravindranath