coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-11-19	mb/intel/adlrvp: Enable CPU PCIe RP 2	Meera Ravindranath
2021-11-17	mb/intel/adlrvp: Fix S0ix regression	Meera Ravindranath
2021-10-04	mb/intel/adlrvp{p,m}: Enable dynamic GPIO PM	Meera Ravindranath
2021-09-24	mb/intel/adlrvp: Switch to using device pointers	Furquan Shaikh
2021-08-28	soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default	Felix Singer
2021-08-27	mb/intel/adlrvp: Enable SaGv support	V Sowmya
2021-08-13	mb/intel/adlrvp: Use HDA TMODE 8T to match spec for ADL P RVP	Sathya Prakash M R
2021-08-10	mb/*/{brya,adlrvp}: move cpu_cluster static configuration to chipset.cb	MAULIK V VAGHELA
2021-08-10	mb/*/brya/adlrvp: Remove hardcoding of BSP APIC ID	MAULIK V VAGHELA
2021-07-15	mb/intel/adlrvp: Disable xDCI in devicetree	Monika A
2021-07-05	mb/intel/adlrvp: Remove ASL code and enable dynamic SSDT creation for camera ...	Varshit B Pandya
2021-07-05	mb/intel/adlrvp: Update the FIVR configurations	V Sowmya
2021-06-16	soc/intel/alderlake/romstage: Update display UPDs based on InternalGfx	Subrata Banik
2021-06-07	soc/intel/adl: Add SKU specific power limits support	Sumeet Pawnikar
2021-06-05	mb/intel/adlrvp: Use device aliases	Subrata Banik
2021-06-05	mb/intel/{adlrvp, sm}: Remove ADL-S devices from ADL-P/M devicetree.cb	Subrata Banik
2021-04-23	mb/intel/adlrvp: Enable DPTF functionality for adlrvp board	Sumeet R Pawnikar
2021-04-22	soc/intel/alderlake: Add enum for HDA audio configuration	Sugnan Prabhu S
2021-04-22	soc/intel/alderlake and mb: Drop PchHdaAudioLink*Enable UPDs from chip.h	Furquan Shaikh
2021-04-21	soc/intel/alderlake: Drop unused `PrmrrSize` from devicetree	Angel Pons
2021-04-12	mb/*: drop LPC generic range for port 80	Michael Niewöhner
2021-04-09	mb/intel/adlrvp: Enable HECI1 communication	Sridhar Siricilla
2021-03-27	mb/intel/adlrvp: Allow GPIO PM override to disable dynamic GPIO PM	Subrata Banik
2021-03-24	mb/intel/adlrvp: Enable CnviBtAudioOffload	Usha P
2021-03-15	mb/intel/adlrvp: Disable non-existing BT PCI interface and add BT flag	Cliff Huang
2021-02-05	soc/intel/alderlake: Refactor PCIE port config	Eric Lai
2021-02-01	soc/intel/alderlake: Create separate Kconfig for CLKSRC and CLKREQ	Subrata Banik
2021-01-30	mb/intel/adlrvp: Remove unnecessary whitespace	Subrata Banik
2021-01-28	mb/intel/adlrvp: Remove ClkReq assignment for RP8	Subrata Banik
2021-01-10	mb/intel/adlrvp: Fix FW download failed for PEG 060, 010	Subrata Banik
2021-01-10	soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPs	Subrata Banik
2020-12-12	mb/intel/adlrvp: Make CLKSRC and CLKREQ proper for PCIE RP8	Subrata Banik
2020-12-02	mb/intel/adlrvp: Replace tab by white space in devicetree	Meera Ravindranath
2020-12-01	mainboard/intel/adlrvp: Enable PCH PCIe device over x1 slot	Subrata Banik
2020-11-23	mb/intel/adlrvp: Enable pre-boot display over HDMI-B port	Subrata Banik
2020-11-08	mb/intel/adlrvp: Refactor ADLRVP code to get rid of 'variants/baseboard'	Subrata Banik