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path: root/src/mainboard/google/kukui/mainboard.c
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2020-07-26mb/google/kukui: send SKU ID to EC for device-specific configurationHung-Te Lin
For devices sharing same firmware, there may be few customization based on SKU ID - for example being clamshell or form factor. On Kukui and Jacuzzi platforms the SKU ID is defined on AP SOC, so we have to send the information to EC. BUG=b:161767717 TEST=make -j # builds and boots on Juniper BRANCH=kukui Change-Id: I8ffdd9fd1e609c1dd4b0e22dc7aab560ccdc842e Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43788 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-11mb/google/kukui: fix screen scrolling on devices using anx7625Paul Ma
anx7625 enables MIPI receiver to check EOTP packet as default. If MIPI_DSI_MODE_EOT_PACKET is not set in flags, soc dsi will not send out EOTP packet and some panel models will display abnormal such as scrolling all the time. BUG=b:144824303 BRANCH=kukui TEST=boot damu board, edp panel with anx7625 as bridge boots up without scrolling. Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com> Change-Id: Iad651202bde2a40024af8c12153143ada2ce2439 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41161 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-06mb/google/kukui: Use SPDX for GPL-2.0-only filesAngel Pons
Done with sed and God Lines. Only done for C-like code for now. Change-Id: I377ee2c9dfa3113f88237bd6ea79031a79f18ad5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40180 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-18mainboard/google: Remove copyright noticesPatrick Georgi
They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I09cc279b1f75952bb397de2c3f2b299255163685 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39607 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2019-09-30mediatek/mt8183: Init SPM driverDawei Chien
To support mt8183 power saving during suspend to RAM, this patch loads SPM firmware to support SPM suspend. SPM needs its own firmware to do these power saving in the right timing under correct conditions. After linux PM suspends, SPM is able to turn off power for the last CPU and do more power saving for the SoC such as DRAM self-refresh mode and turning off 26M crystal. BUG=none BRANCH=none TEST=suspend/resume passes for LPDDR4 3200 Change-Id: I3393a772f025b0912a5a25a63a87512454fbc86e Signed-off-by: Dawei Chien <dawei.chien@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34545 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2019-09-17google/kukui: Pass reset gpio parameter to BL31Tristan Shieh
To support gpio reset SoC, we need to pass the reset gpio parameter to BL31. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui and ATF(BL31) can get this parameter. Change-Id: Iefa70dc0714a9283a79f97d475b07ac047f5f3b0 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31605 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2019-08-21mb/google/kukui: Move panel description to CBFS filesHung-Te Lin
The panel description may be pretty large (for example, 1.3k for BOE TV101) due to init commands and we should only load the right config when display is needed. BUG=None TEST=make -j; boots and see display on Krane. Change-Id: I2560a11ecf7badfd0605ab189d57ec9456850f75 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34877 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-15mb/google/kukui: Report panel manufacturer nameHung-Te Lin
The src/lib/edid now supports reporting manufacturer name so we should define that in MIPI panels and print out in initialization. BUG=None TEST=emerge-kukui coreboot; boots properly Change-Id: If844da84ecca31307127b14c66bbe17c408699f3 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34853 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-15mb/google/kukui: Initialize displayHung-Te Lin
Many devices in Kukui family will be using MIPI panels, which needs hard-coded EDID and initialization commands. And because each device may have its own layout and ID, there should be very few devices sharing same panel configuration. As a result, we want to put panel data (EDID and init commands) into board-specific modules, provided by `get_panel_description` function. The panel numeric ID is identified by ADC 2, and is currently available as higher 4 bits of sku_id(). After ID is retrieved, the get_panel_description should return a reference to the EDID and table of init commands. The default implementation is to simply return NULL, and the data for real devices should be provided by panel_*.c in further commits. BUG=b:80501386,b:117254947 BRANCH=none TEST=boot correctly on Kukui Change-Id: I19213aee1ac0f69f42e73be9e5ab72394f412a01 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32511 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-05-07google/kukui: Support sound in boot processJiaxin Yu
Configure and enable GPIO for speaker amp max98357a. BUG=b:117254418 TEST=Build pass and verified on kukui p1 board BRANCH=None Change-Id: I97655702dff402245326d2eff71fae0e336df9f5 Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32459 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-10-17google/kukui: Configure USBTristan Shieh
Set up USB host controller. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Change-Id: Iec98f3dc1bbf3dda3d28dbefad15339d48608c7e Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/28788 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Joel Kitching <kitching@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2018-09-16google/kukui: Configure EMMCTristan Shieh
Set up EMMC gpios for payloads. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Change-Id: I1e7ee9bfe3a26ed04374e8c74243f48552a1d254 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/28546 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-07-11google/kukui: Update MMU table in romstage and ramstageTristan Shieh
In order to get better performance, map dram as cached after dram ready in romstage. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui. Need a futher check after dram calibration code ready. Change-Id: Ie541fe08ee1d5b260abbabc0a5c18fb04e602b9c Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27304 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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