summaryrefslogtreecommitdiff
path: root/src/mainboard/gigabyte/ma785gmt/mptable.c
AgeCommit message (Collapse)Author
2014-10-16ACPI: Remove CONFIG_GENERATE_ACPI_TABLESVladimir Serbinenko
As currently many systems would be barely functional without ACPI, always generate ACPI tables if supported. Change-Id: I372dbd03101030c904dab153552a1291f3b63518 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4609 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
In the file `COPYING` in the coreboot repository and upstream [1] just one space is used. The following command was used to convert all files. $ git grep -l 'MA 02' | xargs sed -i 's/MA 02/MA 02/' [1] http://www.gnu.org/licenses/gpl-2.0.txt Change-Id: Ic956dab2820a9e2ccb7841cab66966ba168f305f Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2490 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-05-08Clean up #ifsPatrick Georgi
Replace #if CONFIG_FOO==1 with #if CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*1[[:space:]]*\$,#if \1," {} + Replace #if (CONFIG_FOO==1) with #if CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*1)[[:space:]]*\$,#if \1," {} + Replace #if CONFIG_FOO==0 with #if !CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*0[[:space:]]*\$,#if \!\1," {} + Replace #if (CONFIG_FOO==0) with #if !CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*0)[[:space:]]*\$,#if \!\1," {} + (and some manual changes to fix false positives) Change-Id: Iac6ca7605a5f99885258cf1a9a2473a92de27c42 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/1004 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Martin Roth <martin@se-eng.com>
2012-03-08Unify Local APIC address definitionsPatrick Georgi
We used several names for that same value, and hardcoded the value at some more places. They're all LOCAL_APIC_ADDR now (except for lapic specific code that still uses LAPIC_DEFAULT_BASE). Change-Id: I1d4be73b1984f22b7e84681edfadf0588a7589b6 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/676 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-13mptable: Refactor mptable generation some morePatrick Georgi
The last couple of lines of every mptable function were mostly identical. Refactor into common code, a new function mptable_finalize. Coccinelle script: @@ identifier mc; @@ ( -mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); -mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length); -printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n", mc, smp_next_mpe_entry(mc)); -return smp_next_mpe_entry(mc); +return mptable_finalize(mc); | -mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); -mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length); -return smp_next_mpe_entry(mc); +return mptable_finalize(mc); ) Change-Id: Ib2270d800bdd486c5eb49b328544d36bd2298c9e Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/246 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-10-13mptable: Get rid of fixup_virtual_wirePatrick Georgi
As stated in some code files, fixup_virtual_wire was established to avoid touching 200 invocations of the mptable code. Let Coccinelle do it: @@ type T; identifier v; @@ -void fixup_virtual_wire(T v) -{ ... } @@ expression A; identifier v; @@ -v = smp_write_floating_table(A); +v = smp_write_floating_table(A, 0); @@ expression A; identifier v; @@ -v = smp_write_floating_table(A, 0); -fixup_virtual_wire(v); +v = smp_write_floating_table(A, 1); Change-Id: Icad8a063380bf4726be7cebb414d13b574112b14 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/245 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2010-12-16Get mptable OEM/product ID from kconfig variables.Uwe Hermann
We currently use "COREBOOT" unconditionally as the "OEM ID" in our mptable.c files, and hardcode the mainboard name in mptable.c like this: mptable_init(mc, "DK8-HTX ", LAPIC_ADDR); However, the spec says "OEM ID: A string that identifies the manufacturer of the system hardware." (Table 4-2, page 42) so "COREBOOT" doesn't match the spec, we should use the hardware vendor name. Thus, use CONFIG_MAINBOARD_VENDOR which we have already as the "OEM ID" (truncate/fill it to 8 characters as per spec). Also, use CONFIG_MAINBOARD_PART_NUMBER (the board name) as "product ID", and truncate/fill it to 12 characters as per spec, if needed. Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6183 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-21Convert boards to use mptable_write_buses.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6105 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-26We need to call smp_write_lintsrc() instead of smp_write_intsrc() forTobias Diedrich
local ints. This is wrong in most coreboot mptables, probably all generated by util/mptable/mptable.c. After fixing this now XP can boot in MPS mode on my M2V. Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-25Factor out common mptable code to mptable_init().Uwe Hermann
- Drop sig[], oem[], and productid[] fields in all mptable.c files, no longer needed. The sig[] is always the same ("PCMP"), the oem[] is currently also always the same ("COREBOOT"), and productid is being passed into mptable_init() directly as string now. - LAPIC_ADDR is passed in as parameter, too. While at the moment it's always the same value that is passed in, the LAPIC base address could also be relocated theoretically, so keep it as parameter for now. - Fix a few productid entries, they were (partially) incorrect: - DK8S2 (was "DK8X", copypaste) - 939A785GMH (was "MAHOGANY", copypaste) - X6DHE-G (was "X6DHE", incomplete board name) - H8DME-2 (was "H8DMR", copypaste) - H8QME-2+ (was "H8QME", incomplete board name) - X6DHE-G2 (was "X6DHE", incomplete board name) - X6DHR-iG2 (was "X6DHR-iG", incomplete board name) - GA-M57SLI-S4 (was "M57SLI", incomplete board name) - KINO-780AM2 (was "KINO", incomplete board name) - DL145 G1 (was "DL145G1", small fix as per vendor website) - DL145 G3 (was "TREX", wrong board name) - DL165 G6 (was "HP DL165 G6", drop vendor) - S2912 (was "S2895", copypaste) - VT8454c (was "VIA VT8454C", drop vendor, lower-case "c") - EPIA-N (was "P4DPE", copypaste) - pc2500e (was "PC2500", incorrect name) - S1850 (was "S2850", copy-paste) - MS-7135 (was "MS7135") - MS-9282 (was "MS9282") - MS-9185 (was "MS9185") - MS-9652 (was "K9ND MS-9652") - Ultra 40 (was "ultra40") - E326 (was "E325", copypaste) - M4A785-M (was "TILAPIA", copypaste) - P2B-D (was "ASUS P2B-D", drop vendor) - P2B-DS (was "ASUS P2B-DS", drop vendor) - Adapt the mptable utility to use mptable_init() too. Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17Add support for Gigabyte MA785GMT mainboard.Wang Qing Pei
Details of the hardware configuration can be found at http://www.gigabyte.com/products/product-page.aspx?pid=3478 Brief configuration is: 1. CPU:Support for AM3 processors: AMD PhenomTM II processor/ AMD Athlon™ II processor 2. North Bridge: AMD 785G 3. South Bridge: AMD SB710 4: Super IO : ITE8718F The mainboard has two bios flashchip. Coreboot ROM should be flashed into the M_BIOS (which means main bios). Signed-off-by: Wang Qing Pei <wangqingpei@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5713 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1