coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2023-01-30	mb/*: Remove lapic from devicetree	Arthur Heymans
2022-01-16	soc/intel/skl: Replace dt `HeciEnabled` by `HECI1 disable` config	Subrata Banik
2021-08-28	soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default	Felix Singer
2021-05-07	skylake DT/HALO mainboards: Drop `SaGv` setting	Angel Pons
2021-04-20	mb/asrock/h110m: Choose `CHIPSET_LOCKDOWN_COREBOOT`	Angel Pons
2021-01-09	mb/asrock/h110m: Drop VR configuration from devicetree	Felix Singer
2021-01-09	mb/asrock/h110m: Remove zeroed options from devicetree	Felix Singer
2020-11-13	soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig	Michael Niewöhner
2020-10-26	mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`	Michael Niewöhner
2020-08-08	soc/intel/skylake: Enable SDXC depending on devicetree configuration	Felix Singer
2020-08-08	mb/asrock/h110m: remove unused Device4Enable from devtree	Maxim Polyakov
2020-08-03	mb/asrock/h110m: Relocate devicetree settings	Angel Pons
2020-07-29	soc/intel/skylake: Enable HDA depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable eMMC depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable SMBus depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable LAN depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable SATA depending on devicetree configuration	Felix Singer
2020-07-26	skylake boards: Factor out copy-pasted PIRQ routes	Angel Pons
2020-05-27	mb/asrock/h110m: Remove duplicated PmTimerDisabled	Angel Pons
2020-05-18	skylake: update processor power limits configuration	Sumeet R Pawnikar
2020-05-18	mainboard///*.cb: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-09	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi
2020-03-18	mainboard/[a-f]*: Remove copyright notices	Patrick Georgi
2020-03-03	mb/asrock/h110m: Explain why some SATA ports are empty	Maxim Polyakov
2020-01-10	mb/**/devicetree.cb: Remove untrue comments	Angel Pons
2019-12-05	mb/asrock/h110m: disable CLKREQ to use onboard LAN	Maxim Polyakov
2019-11-04	mb/asrock/h110m/devicetree: fix VR config info	Maxim Polyakov
2019-11-04	mb/asrock/h110m: use SSDT generator for SuperIO	Maxim Polyakov
2019-10-31	mb/asrock/h110m: configure SuperIO Deep Sleep	Maxim Polyakov
2019-10-02	soc/intel/skylake: devicetree: introduce PchHdaVcType fsp parameter	Michael Niewöhner
2019-09-14	mb/asrock/h110m: configure SuperIO global registers	Maxim Polyakov
2019-09-14	mb/asrock/h110m: configure GPIOs in SuperIO chip	Maxim Polyakov
2019-09-14	mb/asrock/h110m: enable ACPI LDN in SuperIO	Maxim Polyakov
2019-09-14	mb/asrock/h110m: set I/O Range for SuperIO HWM	Maxim Polyakov
2019-09-09	mb/asrock/h110m: add missing pci devices to tree	Maxim Polyakov
2019-09-09	mb/asrock/h110m: disable unused sata ports	Maxim Polyakov
2019-09-09	mb/asrock/h110m: disable unused serial buses	Maxim Polyakov
2019-09-09	mb/asrock/h110m: remove unsed i2c_voltage settings	Maxim Polyakov
2019-09-09	mb/asrock/h110m: use VR_CFG_AMP() macro to set PSI threshold	Maxim Polyakov
2019-09-09	mb/asrock/h110m: fix VR domains configuration	Maxim Polyakov
2019-06-27	mb/asrock/h110m: set serirq_mode to continuous mode	Maxim Polyakov
2019-04-11	mb/asrock/h110m: Add virtual LDN for SuperIO to DT	Maxim Polyakov
2019-04-06	mb/asrock/h110m: Add PEG Gen3 support	Maxim Polyakov
2019-04-06	mb/asrock/h110m: Set PEG as primary GFX device	Maxim Polyakov
2019-04-06	{mb,soc/intel/skylake}: remove unused InternalGfx	Maxim Polyakov
2019-03-19	mainboard: Add ASRock H110M-DVS	Maxim Polyakov