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path: root/src/mainboard/amd/thatcher/buildOpts.c
AgeCommit message (Expand)Author
2022-05-28vendorcode/amd/agesa/f15tn: Fix all improper use of .dataArthur Heymans
2020-10-17AGESA mb: Replace tab with space in macro definition for consistencyPaul Menzel
2020-06-01AGESA f14/f15tn/f16kb: Clean up buildOpts.c filesAngel Pons
2020-05-26AGESA f14/f15tn/f16kb: Deduplicate RAM settingsAngel Pons
2020-05-26AGESA f15tn: Factor out default MTRR settingsAngel Pons
2020-05-26AGESA f14/f15tn/f16kb: Factor out memory settingsAngel Pons
2020-05-26AGESA f14/f15tn/f16kb: Factor out PCI MMIO base/sizeAngel Pons
2020-05-26AGESA f14/f15tn/f16kb: Factor out AGESA_VERSION_STRINGAngel Pons
2020-05-26AGESA f14/f15tn/f16kb: Factor out AGESA_PACKAGE_STRINGAngel Pons
2020-05-26mb/*/*/buildOpts.c: Clean up whitespaceAngel Pons
2020-05-26mb/*/*/buildOpts.c: Drop BLDCFG_IR_PIN_CONTROLAngel Pons
2020-05-13src/mainboard: Remove unused 'include <stdlib.h>'Elyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-04mainboard/amd: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-18mainboard/[a-f]*: Remove copyright noticesPatrick Georgi
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2018-11-05amd: Fix non-local header treated as localElyes HAOUAS
2017-09-13AGESA vendorcode: Move PlatformInstall.hKyösti Mälkki
2017-09-12AGESA boards: Clean up Ids.h and Filecode.h includesKyösti Mälkki
2017-07-06mainboard/[a-e]: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2016-08-14src/mainboard: Capitalize ROM, RAM, CPU and APICElyes HAOUAS
2016-07-31Remove extra newlines from the end of all coreboot files.Martin Roth
2016-06-04AGESA boards: Split dispatcher to romstage and ramstageKyösti Mälkki
2016-05-10AGESA boards: Relocate platform memory configKyösti Mälkki
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-06-08Remove empty lines at end of fileElyes HAOUAS
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-10AGESA: Drop unused AGESA_MEM_TABLEKyösti Mälkki
2015-01-06Remove AMD's "Release Content" doxygen from coreboot filesMartin Roth
2014-12-19mainboard: Strip out some dead includesEdward O'Callaghan
2014-07-24src/mainboard: Remove trailing whitespaceElyes HAOUAS
2014-07-18mainboard: Make use of ARRAY_SIZE in buildOpts.c on AGESA platformsEdward O'Callaghan
2013-11-22AMD f15tn, f16kb: Remove CDIT table and DMI tableWANG Siyuan
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2012-08-02AMD Thatcher Board based on trinityzbao
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