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On Sabrina SoCs the size of the APOB has increased, so the size of the
RW_MRC_CACHE FMAP sections needs to be increased in order for the data
to still fit in the corresponding FMAP partition.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib31b918aba90dd507b47aec9e1f75c138857cd02
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62155
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Add chausie EC blob into CBFS at specified location
Change-Id: I48de08a18054efbda655e1563a539ff2ba7a38a6
Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61972
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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To have the new AMD Sabrina SoC code tested, add the AMD Chausie
mainboard as a copy of Majolica. This patch also changes the name from
Majolica to Chausie, selects the Sabrina SoC instead of the Cezanne SoC
and comments out the APCB_SOURCES since those aren't available in the
3rdparty/blobs repository yet.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic7b18f7a6ae5b8365234dd1227e0b1f7f37279da
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61079
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
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