summaryrefslogtreecommitdiff
path: root/src/include
AgeCommit message (Expand)Author
2012-11-09mc146818rtc: Remove the hyphen to build on NetBSD and DarwinZheng Bao
2012-11-08Log unexpected post code from the previous bootDuncan Laurie
2012-11-08Add support for storing POST codes in CMOSDuncan Laurie
2012-11-08elog: add extended management engine eventDuncan Laurie
2012-11-07SPI: opmenu special case for WREN as atomic prefixDuncan Laurie
2012-11-07RTC: Write build date in BCD when clearing RTC CMOSDuncan Laurie
2012-11-07EC: Prepare to read and log last post code from previous bootDuncan Laurie
2012-11-07Add POST code for "All devices initialized"Stefan Reinauer
2012-11-06Drop redundant CHIP_NAME in mainboard.cKyösti Mälkki
2012-11-06Add name field for deviceKyösti Mälkki
2012-11-05Overhaul speedstep codeNico Huber
2012-11-01Merge cpu/intel/acpi.h into cpu/intel/speedstep.hNico Huber
2012-10-29Drop get_smbios_data from chip_operationsKyösti Mälkki
2012-10-27Take care of NULL chip_ops->nameKyösti Mälkki
2012-09-13Fix tracing compilation on SMM enabled targets.Rudolf Marek
2012-09-05buildsystem: Make CPU microcode updating more configurableAlexandru Gagniuc
2012-08-27Drop unused ISA Pnp definitionsKyösti Mälkki
2012-08-27AMD northbridges: factor out CPU allocationKyösti Mälkki
2012-08-09AMD northbridge: copy TOP_MEM and TOP_MEM2 for distributionKyösti Mälkki
2012-08-09Synchronize rdtsc instructionsStefan Reinauer
2012-08-08Do not allow modifying memory table directlyKyösti Mälkki
2012-08-08Fix SMBIOS generationStefan Reinauer
2012-08-07Move cpus_ready_for_init() to AMD K8Kyösti Mälkki
2012-08-04Add a capability for mainboard-specific posting.Alexandru Gagniuc
2012-08-04Make the device tree available in the rom stageStefan Reinauer
2012-08-03Fix mainboard level enable_dev()Kyösti Mälkki
2012-08-02RTC: Add a routine to check if the CMOS date is validzbao
2012-08-02AMD and GFXUMA: move setup_uma_memory() to northbridgeKyösti Mälkki
2012-08-01Intel Sandybridge: add reserved memory as resourcesKyösti Mälkki
2012-07-31Revert "Use broadcast SIPI to startup siblings"Sven Schnelle
2012-07-27Allocators for different memory regions typesKyösti Mälkki
2012-07-26ELOG: Fix reporting of developer/recovery modesDuncan Laurie
2012-07-26Log event for abnormal management engine statusDuncan Laurie
2012-07-26USBDEBUG: buffer up to 8 bytesSven Schnelle
2012-07-26ELOG: Add support for SMM and kernel GSMI driverDuncan Laurie
2012-07-25SMM: rename tseg_fixup to tseg_relocate and exportDuncan Laurie
2012-07-25Extend smbios api to allow runtime change of mainboard serial and versionChristian Gmeiner
2012-07-25ELOG: Add support for a monotonic boot counter in CMOSDuncan Laurie
2012-07-25ELOG: Add support for generating SMBIOS type15 tableDuncan Laurie
2012-07-24SMM: Fix state save map for sandybridge and TSEGDuncan Laurie
2012-07-24ELOG: Add support for flash based event logDuncan Laurie
2012-07-24Implement stack overflow checking for the BSPRonald G. Minnich
2012-07-24Add code to read Intel microcode from CBFSVadim Bendebury
2012-07-24Add support for HM70 and NM70 LPC bridgeStefan Reinauer
2012-07-24Add uartmem_init prototype.Marc Jones
2012-07-24RTC: Add defines for standard clock offsetsDuncan Laurie
2012-07-24Remove unused free() functionStefan Reinauer
2012-07-24SPI flash layer: remove unused function spi_flash_free()Stefan Reinauer
2012-07-20Allow shutting down internal graphics if plugin graphics are preferredPatrick Georgi
2012-07-16Change uma_resource() to use new type IORESOURCE_UMA_FB.Kyösti Mälkki
2012-07-16Define global uma_memory variablesKyösti Mälkki
2012-07-16Add global uma_resource()Kyösti Mälkki
2012-07-13MPTAPLE: generate from devicetree.cbSven Schnelle
2012-07-12Lenovo X60: correct SDHCI write protect polarityJonathan A. Kollasch
2012-07-09SMBIOS: Add Type 38 (IPMI) data structureSven Schnelle
2012-07-05PCI Type2 config must dieRonald G. Minnich
2012-07-04Intel cpus: Extend cache to cover complete Flash DeviceKyösti Mälkki
2012-07-03AGESA F15 wrapper for Trinityzbao
2012-07-02Use broadcast SIPI to startup siblingsSven Schnelle
2012-07-02Intel CPUs: execute microcode update only once per coreKyösti Mälkki
2012-05-30Add support for Panther Point to SPI driverStefan Reinauer
2012-05-24cbtypes.h: Unify cbtypes.h used in AMD board's codeVikram Narayanan
2012-05-11Hook up MRC cache updateStefan Reinauer
2012-05-10Add SPI flash driverStefan Reinauer
2012-05-08Add config_enabled() from LinuxPatrick Georgi
2012-05-08Clean up #ifsPatrick Georgi
2012-05-01Allow device ID arrays in the PCI driver structureVadim Bendebury
2012-04-27SMM: unify mainboard APM command handlersStefan Reinauer
2012-04-27cpu/cpu.h: add ROMCC guardsStefan Reinauer
2012-04-27Move top level pc80 directory to drivers/Stefan Reinauer
2012-04-26Revamp Intel microcode update codeStefan Reinauer
2012-04-25Replace cache control magic numbers with symbolsPatrick Georgi
2012-04-16S3 code in coreboot public folder.zbao
2012-04-12Add support for aligned allocationRon Minnich
2012-04-06Fixes and Sandybridge support for lapic cpu initStefan Reinauer
2012-04-06Add constants for fast path resume copyingStefan Reinauer
2012-04-05Fill out ChromeOS specific coreboot table extensionsStefan Reinauer
2012-04-04Add support to run SMM handler in TSEG instead of ASEGStefan Reinauer
2012-04-03Add support for Intel Turbo Boost featureStefan Reinauer
2012-04-03smbios: add support for onboard devices extended informationStefan Reinauer
2012-04-02Add a helper function to determine the number of enabled CPUsStefan Reinauer
2012-04-02Align: Make sure 1 is treated as unsigned long instead of intStefan Reinauer
2012-03-30Make MTRR min hole alignment 64MBDuncan Laurie
2012-03-30Add more timestamps in coreboot.Stefan Reinauer
2012-03-30Add timestamps for selfboot and acpi wakeDuncan Laurie
2012-03-30Add TPM support to corebootStefan Reinauer
2012-03-30Add an option to keep the ROM cached after romstageStefan Reinauer
2012-03-29Add infrastructure for global data in the CAR phase of bootGabe Black
2012-03-29Detect whether the OXPCIE card is really present while in the ROM stage.Gabe Black
2012-03-29Add support for enabling PCIe Common Clock and ASPMDuncan Laurie
2012-03-29Refactor publishing CBMEM addresses through coreboot table.Vadim Bendebury
2012-03-29Add timestamp table pointer to the coreboot table.Vadim Bendebury
2012-03-29CBMEM CONSOLE: Add CBMEM type for console buffer.Vadim Bendebury
2012-03-29CBMEM CONSOLE: Add CBMEM console driver implementation.Vadim Bendebury
2012-03-29Increase CBMEM to accommodate larger console.Vadim Bendebury
2012-03-28Add cmos helper functions for reading/writing a dwordDuncan Laurie
2012-03-28Add timestamp collecting to coreboot.Vadim Bendebury
2012-03-28Initialize CBMEM early.Vadim Bendebury
2012-03-27Add RDC R8610 PCI IDs.Rudolf Marek
2012-03-16xchg is atomic with side-effectsPatrick Georgi
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 13:21:01 +0000