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AgeCommit message (Expand)Author
2024-05-14soc/intel: Add Panther Lake PCIE device IDsSaurabh Mishra
2024-05-13cpu/x86/pae/pgtbl.c: remove dead map_2M_page()Krystian Hebel
2024-05-12soc/intel/lunarlake: Support stepping A0_2Saurabh Mishra
2024-04-05smmstorev2: Load the communication buffer at SMM setupArthur Heymans
2024-04-03cpu/x86/topology: Add node ID parserPatrick Rudolph
2024-03-05soc/intel: Add definition of D0 stepping for TigerLake HaloAlicja Michalska
2024-02-28cpu/x86/(sipi|smm): Pass on CR3 from ramstageArthur Heymans
2024-01-31cpu/x86/smm/pci_resource_store: Store DEV/VEN IDPatrick Rudolph
2024-01-24soc/intel: Add Lunar Lake device IDsAppukuttan V K
2024-01-10cpu/x86/smi_trigger: use enum cb_err as apm_control return typeFelix Held
2023-12-22x86: Separate CPU and SoC physical address sizeJeremy Compostella
2023-12-13drivers/ipmi to lib: Fix misspellings & capitalization issuesMartin Roth
2023-11-10src: Remove unnecessary semicolons from the end of macrosMartin Roth
2023-11-10cpu/x86/smm: Fix get_save_state calculationEugene D. Myers
2023-09-29*/include/cpu: use unsigned int for number of address bitsFelix Held
2023-09-12arch/x86: Reduce max phys address size for Intel TME capable SoCsJeremy Compostella
2023-08-05src/*/post_code.h: Change post code prefix to POSTCODEYuchen He
2023-07-18include/cpu/amd/msr: introduce and use PSTATE_MSR_COUNTFelix Held
2023-07-12treewide: Drop the suffixes from ADL and RPL CPUID macros and stringsMichał Żygowski
2023-07-12soc/intel/alderlake: Add support for Raptor Lake S CPUsMax Fritz
2023-07-05arch/x86: Ensure LAPIC mode for exception handlerKyösti Mälkki
2023-07-03cpu/x86: Reduce scope of MTRR functions used locallyKyösti Mälkki
2023-06-29soc/intel/meteorlake: Add QS(C0) stepping CPU IDMusse Abdullahi
2023-06-07soc/amd/common/block/cpu/noncar: add get_usable_physical_address_bits()Felix Held
2023-06-04cpu/x86/smm: Drop fxsave/fxrstor logicArthur Heymans
2023-06-02soc/amd/common/block/cpu: Refactor ucode allocationGrzegorz Bernacki
2023-06-02include/cpu/x86: Simplify en/dis cache functionsHimanshu Sahdev
2023-06-01include/cpu/x86: Skip `wbinvd` on CPUs with cache self-snooping (SS)Subrata Banik
2023-06-01cpu/x86/cache: Call wbinvd only once CR0.CD is setJeremy Compostella
2023-05-31cpu/x86/mp_init: Use clflush to write SIPI data back to RAMJeremy Compostella
2023-05-26treewide: Remove 'extern' from functions declarationElyes Haouas
2023-04-23include/cpu/amd/mtrr: fix typo in get_top_of_mem_above_4gbFelix Held
2023-04-21include/cpu/amd/mtrr: return uint32_t from get_top_of_mem_below_4gbFelix Held
2023-04-21include/cpu/amd/mtrr: rename functions to get top of memory regionsFelix Held
2023-04-18src/cpu/power9: move part of scom.h to scom.cSergii Dmytruk
2023-04-15soc/intel/meteorlake: Add B0 stepping CPU IDMusse Abdullahi
2023-04-06cpu/x86/topology: Add code to fill in topology on struct pathArthur Heymans
2023-04-06cpu/smm_module_loader.c: Fix up CPU index locallyArthur Heymans
2023-04-06cpu/x86/mp_init.c: Generate a C header to get start32 offsetArthur Heymans
2023-04-06cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_pathArthur Heymans
2023-03-24cpu/intel: Remove redefined SAPPHIRERAPIDS_SP CPUID to fix build errorJohnny Lin
2023-03-23soc/amd/common/block/acpi/cpu_power_state: use pstate_msr unionFelix Held
2023-03-23soc/intel/xeon_sp: Report platform cpu infoNaresh Solanki
2023-03-19soc/intel/xeon_sp/spr: Add header files and romstage codeJonathan Zhang
2023-03-13cpu/x86/cache: CLFLUSH programs to memory before runningArthur Heymans
2023-03-08soc/amd/include/msr: factor out P state MSR enable bit to cpu/amd/msr.hFelix Held
2023-03-05cpu/x86/smm: Add PCI resource store functionalityRobert Zieba
2023-02-28soc/amd: introduce and use PSTATE_MSR macroFelix Held
2023-02-15cpu/x86/smm: Enable setting SMM console log level from mainboardJohnny Lin
2023-02-07src: Move POST_BOOTBLOCK_CAR to common postcodes and use itMartin Roth
2023-02-02include/cpu/amd/mtrr: drop unused TOP_MEM_MASK definitionsFelix Held
2023-01-19tree: Drop Intel Ice Lake supportFelix Singer
2023-01-09security/intel/txt: Add helper function to disable TXTSubrata Banik
2022-12-10cpu/cpu.h: Change the function signatureArthur Heymans
2022-12-10treewide: Include <device/mmio.h> instead of <arch/mmio.h>Elyes Haouas
2022-12-07mb,sb,soc/intel: Drop useless IO trap handlersKyösti Mälkki
2022-12-05cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfmArthur Heymans
2022-11-23cpu/intel/car: Define post codesMartin Roth
2022-11-17mb/emulation/qemu-q35: Split smm_close() and smm_lock()Kyösti Mälkki
2022-11-16cpu/x86/smm: Use common SMM_ASEG regionKyösti Mälkki
2022-11-14cpu/cpu.h: Remove unused functions prototypesArthur Heymans
2022-11-12include/cpu/msr.h: transform into an unionArthur Heymans
2022-11-10cpu/x86/lapic.h: Fix CONFIG_X2APIC_RUNTIMEArthur Heymans
2022-11-09cpu/*: Drop PARALLEL_MP leftoversArthur Heymans
2022-11-03treewide: Add 'IWYU pragma: export' commentElyes Haouas
2022-10-21arch/x86/include: Split msr access into separate fileMartin Roth
2022-09-24include/cpu/x86/mtrr: define NUM_FIXED_MTRRS once in mtrr.hFelix Held
2022-09-16soc/intel/cnl: Add Cometlake-H/S Q0 (10+2) CPU IDJeremy Soller
2022-09-15soc/amd: Do SMM relocation via MSRArthur Heymans
2022-08-11include: Add SPDX identifiers to files missing themMartin Roth
2022-08-01include: Add SPDX-License-Identifiers to files missing themMartin Roth
2022-07-18arch/x86: Add X2APIC_LATE_WORKAROUNDSubrata Banik
2022-06-28soc/intel: Add Raptor Lake device IDszhixingma
2022-06-22cpu/intel/microcode: Have API to re-load microcode patchSubrata Banik
2022-06-17soc/intel/alderlake/report_platform.c: Add ADL-S identificationMichał Żygowski
2022-06-09soc/amd/sabrina/acpi: Correct VID decoding on SabrinaFred Reitberger
2022-06-02cpu/x86/mp_init.c: Prolong delay on synchronous APIArthur Heymans
2022-06-02cpu/x86/mp.h: Implement a pre-SSE2 mfenceArthur Heymans
2022-06-01mb/emulation/qemu-q35: Support PARALLEL_MP with SMM_ASEGArthur Heymans
2022-06-01Revert "cpu/x86: Add function to set `put_back_original_solution` variable"Arthur Heymans
2022-05-28cpu/x86/mp_init.c: Drop 'real' vs 'used' save stateArthur Heymans
2022-05-16soc/intel: Add Raptor Lake device IDsBora Guvendik
2022-05-16arch/x86/postcar: Set up postcar MTRR in C codeArthur Heymans
2022-05-16cpu/x86/mp_init.c: Add mp_run_on_all_cpus_synchronouslyKane Chen
2022-04-13cpu/x86: Add function to set `put_back_original_solution` variableKane Chen
2022-04-04soc/intel/alderlake: Add new CPU IDLean Sheng Tan
2022-04-04soc/intel/alderlake: Update CPU IDs with correct steppingsLean Sheng Tan
2022-03-10cpu/x86/smm: Add weak SoC init and exit methodsRaul E Rangel
2022-03-09cpu/intel/common: Add support for energy performance preference (EPP)Cliff Huang
2022-03-09soc/intel/common: Include Meteor Lake device IDsWonkyu Kim
2022-03-09cpu/x86/smm,lib/cbmem_console: Enable CBMEMC when using DEBUG_SMIRaul E Rangel
2022-02-11src/arch/ppc64/*: pass FDT address to payloadSergii Dmytruk
2022-02-11src/cpu/power9: add file structure for power9, implement SCOM accessIgor Bagnucki
2022-02-10Revert "cpu/x86/lapic: Unconditionally use CPUID leaf 0xb if available"Felix Held
2022-02-07cpu/x86/mp_init.c: Rename num_concurrent_stacksArthur Heymans
2022-02-07cpu/x86/smm: Improve smm stack setupArthur Heymans
2022-02-05cpu/x86/lapic: Move LAPIC configuration to MP initKyösti Mälkki
2022-02-05cpu/x86/lapic: Fix choice X2APIC_ONLYKyösti Mälkki
2022-02-05cpu/x86/lapic: Add lapic_send_ipi_self,others()Kyösti Mälkki
2022-02-05cpu/x86/lapic: Unify some parameterKyösti Mälkki