coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-03-09	cpu/intel/common: Add support for energy performance preference (EPP)	Cliff Huang
2022-02-05	cpu/x86/lapic: Support switching to X2APIC mode	Kyösti Mälkki
2021-08-16	soc/intel/common/block/cpu: Introduce CAR_HAS_L3_PROTECTED_WAYS Kconfig	Subrata Banik
2021-08-15	soc/intel/common: Calculate and configure SF Mask 2	Subrata Banik
2021-07-24	include/cpu: Remove one space from bitfield macro definition	Subrata Banik
2021-07-24	include/cpu: Use tab instead of space	Subrata Banik
2021-07-14	include/cpu/x86/msr: move MC0_CTL_MASK to include/cpu/amd/msr	Felix Held
2021-07-14	include/cpu/x86/msr: add mca_clear_status function	Felix Held
2021-07-14	include/cpu/x86/msr: introduce IA32_MC_*(x) macros	Felix Held
2021-07-14	include/cpu/x86/msr: add IA32_ prefix to MC0_ADDR and MC0_MISC	Felix Held
2021-07-12	include/cpu/x86/msr: fix MCG_CTL_P definition	Felix Held
2021-07-12	include/cpu/x86/msr: add mca_get_bank_count function	Felix Held
2021-04-30	cpu/x86/msr: introduce helpers msr_read, msr_write	Michael Niewöhner
2020-10-24	cpu/intel/common: rework code previously moved to common cpu code	Michael Niewöhner
2020-10-16	include/cpu/x86: introduce new helper for (un)setting MSRs	Michael Niewöhner
2020-09-14	src/include: Drop unneeded empty lines	Elyes HAOUAS
2020-09-14	soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode	Aamir Bohra
2020-02-21	security/intel/stm: Check for processor STM support	Eugene Myers
2020-02-05	security/intel/stm: Add STM support	Eugene Myers
2019-12-19	Drop ROMCC code and header guards	Arthur Heymans
2019-12-18	Revert "include/cpu/x86: Add STM Support"	Aaron Durbin
2019-12-18	include/cpu/x86: Add STM Support	Eugene D. Myers
2019-10-31	cpu/x86: make set_msr_bit publicly available	Michael Niewöhner
2019-06-21	cpu/x86/msr: Move IA32_MISC_ENABLE bits to common place	Elyes HAOUAS
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2018-12-13	cpuid: Add helper function for cpuid(1) functions	Subrata Banik
2018-11-08	src: Replace common MSR addresses with macros	Elyes HAOUAS
2018-10-30	src: Move shared amd64 and IA32 MSRs to <cpu/x86/msr.h>	Elyes HAOUAS
2018-10-18	cpu/amd: Use common AMD's MSR	Elyes HAOUAS
2018-10-11	src: Move common IA-32 MSRs to <cpu/x86/msr.h>	Elyes HAOUAS
2018-10-08	Move compiler.h to commonlib	Nico Huber
2018-09-14	complier.h: add __always_inline and use it in code base	Aaron Durbin
2018-08-17	src/include: add more msr defines	Matt Delco
2018-04-23	cpu/x86: move NXE and PAT accesses to paging module	Aaron Durbin
2017-03-13	src/include: Wrap lines at 80 columns	Lee Leahy
2017-03-12	src/include: Open brace on same line as enum or struct	Lee Leahy
2017-03-09	src/include: Fix unsigned warnings	Lee Leahy
2016-09-05	src/include: Improve code formatting	Elyes HAOUAS
2016-07-31	src/include: Capitalize CPU, RAM and ROM	Elyes HAOUAS
2016-07-27	cpu/x86: Support CPUs without rdmsr/wrmsr instructions	Lee Leahy
2011-11-01	remove trailing whitespace	Stefan Reinauer
2010-09-17	AMD Fam10 code breaks with gcc 4.5.0.	Scott Duplichan
2010-06-10	This commit updates the Geode LX GLCP delay control setup from the v2 way to ...	Edwin Beasant
2010-04-27	Since some people disapprove of white space cleanups mixed in regular commits	Stefan Reinauer
2010-03-28	drop unneeded __ROMCC__ checks when the check for __PRE_RAM__ is more	Stefan Reinauer
2009-11-06	Split the two usages of __ROMCC__:	Myles Watson
2005-07-06	Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51	arch import user (historical)
2004-10-14	- Renamed cpu header files	Eric Biederman