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path: root/src/cpu
AgeCommit message (Expand)Author
2024-04-05smmstorev2: Load the communication buffer at SMM setupArthur Heymans
2024-04-04tree: Remove duplicated <stdint.h>Elyes Haouas
2024-04-03cpu/x86/topology: Add node ID parserPatrick Rudolph
2024-03-28cpu/x86/Kconfig: Mark 64bit support as stableArthur Heymans
2024-03-28cpu/x86: Link page tables in stage if possibleArthur Heymans
2024-03-21arch/x86: Fix typo for macro CPUID_FEATURE_HTTJincheng Li
2024-03-20cpu/x86/smm: Pass full SMRAM region info to SMM runtimeBenjamin Doron
2024-03-19cpu/x86: Use correct config flag for 1GiB page tableBora Guvendik
2024-03-19cpu/x86/mtrr: Error out caching limitation during NEMSubrata Banik
2024-03-09cpu/x86/smm: Set up page tables in safe SMRAMArthur Heymans
2024-02-28cpu/x86/(sipi|smm): Pass on CR3 from ramstageArthur Heymans
2024-02-26lib: Remove heap from rmodulesArthur Heymans
2024-02-20treewide: Remove unused CHIPsArthur Heymans
2024-02-18arch to cpu: Add SPDX license headers to Kconfig filesMartin Roth
2024-02-08cpu/x86/64bit: Turn jumping to long mode into a macroArthur Heymans
2024-02-08cpu/qemu-x86/cache_as_ram: Move guardArthur Heymans
2024-02-08cpu/x86: Add 1GiB pages for memory access up to 512GiBAshish Kumar Mishra
2024-02-02cpu/x86/smm/pci_resource_store: Allow devices with no resourcesPatrick Rudolph
2024-01-31cpu/x86/smm/pci_resource_store: Store DEV/VEN IDPatrick Rudolph
2024-01-31device/device.h: Rename busses for clarityArthur Heymans
2024-01-31include/device/device.h: Remove CHIP_NAME() macroNicholas Sudsgaard
2024-01-24cpu: Rename Makefiles from .inc to .mkMartin Roth
2024-01-17Reland "Kconfig: Bring HEAP_SIZE to a common, large value"Patrick Georgi
2024-01-14tree: Use accessor functions for struct region fieldsNico Huber
2024-01-11cpu/x86/smi_trigger: use call_smmFelix Held
2024-01-10cpu/x86/smi_trigger: use enum cb_err as apm_control return typeFelix Held
2024-01-08cpu/x86/smi_trigger: call pm_acpi_smi_cmd_port to get APMC SMI IO portFelix Held
2024-01-05arch/x86/include/mode_switch: Add more wrapper functionsPatrick Rudolph
2024-01-05northbridge/intel/sandybridge: Enable x86_64 for mrc.binPatrick Rudolph
2024-01-05cpu/x86/64bit/mode_switch2: The reverse function to mode_switchPatrick Rudolph
2024-01-03cpu/x86/64bit/mode_switch: Simplify assembly codePatrick Rudolph
2023-12-22Revert "cpu/intel/common: Define build time physical address reserved bits"Jeremy Compostella
2023-12-04cpu/intel/model_206ax: Use macro IS_IVY_CPUPatrick Rudolph
2023-11-20nb/intel/sandybridge: Use SA devid to identify PC typePatrick Rudolph
2023-11-20cpu/intel/model_206ax: Lock MSR_PP_CURRENT_CONFIGPatrick Rudolph
2023-11-20cpu/intel/model_206ax: Write MSRs in scope package only oncePatrick Rudolph
2023-11-14cpu/intel/model_2065x: Read CPU voltage for SMBIOSPatrick Rudolph
2023-11-10cpu/x86/smm: Fix get_save_state calculationEugene D. Myers
2023-11-09Allow to build romstage sources inside the bootblockArthur Heymans
2023-11-07Revert "Kconfig: Bring HEAP_SIZE to a common, large value"Patrick Georgi
2023-10-20cpu/intel/common: Define build time physical address reserved bitsJeremy Compostella
2023-10-20x86: Add pre-memory stages CBFS cache scratchpad supportJeremy Compostella
2023-10-11Kconfig: Bring HEAP_SIZE to a common, large valuePatrick Georgi
2023-10-06cpu/intel/model_206ax: Only use supported C-statesPatrick Rudolph
2023-10-06cpu/intel/model_206ax: Use haswell cstate_mapPatrick Rudolph
2023-10-06cpu/intel/model_206ax: Print supported C-statesPatrick Rudolph
2023-10-05cpu/intel/socket_BGA956: Double DCACHE_RAM_SIZE to 64 kBArthur Heymans
2023-09-29arch/x86/Kconfig: introduce RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORTFelix Held
2023-09-29*/include/cpu: use unsigned int for number of address bitsFelix Held
2023-09-20cpu/x86/mtrr/debug: rename variables in display_variable_mtrrFelix Held
2023-09-20cpu/x86/mtrr/debug: use MTRR_PHYS_MASKFelix Held
2023-09-20cpu/x86/mtrr/debug: use msr_t parameter in display_mtrr_fixed_typesFelix Held
2023-09-20cpu/x86/mtrr/debug: make local MSR variables constFelix Held
2023-09-20cpu/x86/mtrr/debug: drop unnecessary MSR unionFelix Held
2023-09-14x86: Add .data section support for pre-memory stagesJeremy Compostella
2023-09-12arch/x86: Reduce max phys address size for Intel TME capable SoCsJeremy Compostella
2023-09-12cpu/intel: Move is_tme_supported() from soc/intel to cpu/intelJeremy Compostella
2023-09-08arch to drivers/intel: Fix misspellings & capitalization issuesMartin Roth
2023-08-21cpu/x86/smm: Don't save EFERArthur Heymans
2023-08-08cpu/amd/pi/00730F01: Use common code for mp_initArthur Heymans
2023-08-06cpu: Add SPDX license headers to MakefilesMartin Roth
2023-08-05src/*/post_code.h: Change post code prefix to POSTCODEYuchen He
2023-08-04cpu: Get rid of CPU_SPECIFIC_OPTIONSElyes Haouas
2023-07-12cpu/amd/mtrr: Use newer function for resource declarationArthur Heymans
2023-07-12cpu/intel/microcode: Drop unnecessary alignment for split microcodeSubrata Banik
2023-07-08cpu/x86/lapic: Fix regression with X2APIC_LATE_WORKAROUNDKyösti Mälkki
2023-07-08cpu: Enable per-CPUID microcode loading in CBFSSubrata Banik
2023-07-08cpu/intel/microcode: Avoid Pre-RAM microcode update if FIT enableSubrata Banik
2023-07-06cpu/x86: Add some notes about XAPIC/X2APICKyösti Mälkki
2023-07-06cpu/x86/lapic: Fix X2APIC_ONLY regressionKyösti Mälkki
2023-07-03cpu/x86: Reduce scope of MTRR functions used locallyKyösti Mälkki
2023-06-23commonlib/console/post_code.h: Change post code prefix to POSTCODElilacious
2023-06-04cpu/x86/smm: Drop fxsave/fxrstor logicArthur Heymans
2023-05-31cpu/x86/mp_init: Use clflush to write SIPI data back to RAMJeremy Compostella
2023-05-27libpayload;arch,cpu/x86: drop USE_MARCH_586 Kconfig optionFelix Held
2023-05-27cpu/intel/haswell: Add Broadwell Trad µcode updatesAngel Pons
2023-05-26cpu/x86/sse_enable.inc: Remove unused fileArthur Heymans
2023-05-25cpu/Kconfig: Remove MMX config optionArthur Heymans
2023-05-23cpu/x86/smm_stub.S: Fix commentArthur Heymans
2023-05-23cpu/x86/smm_stub.S: Update commentArthur Heymans
2023-05-21Kconfig: Get rid of named choice LAPIC_ACCESS_MODEMartin Roth
2023-05-18cpu/qemu-x86/cache_as_ram_bootblock: drop duplicated post codeAlexander Goncharov
2023-05-16cpu/amd/pi/00730f01/Kconfig: use hexadecimal CPU number in ACPIFelix Held
2023-05-13acpi/Kconfig: move \_SB scope out of ACPI_CPU_STRINGFelix Held
2023-05-13cpu,nb/amd/pi/00730F01: dynamically generate CPU devicesFelix Held
2023-04-28treewide: Add missing include guards to chip.hJan Samek
2023-04-26cpu/intel/speedstep: Separate single SSDT CPU entryKyösti Mälkki
2023-04-22cpu/amd/pi/00730F01: rename fixme.c to cpu_io_init.cFelix Held
2023-04-21cpu/amd/pi/00730F01/fixme: replace some magic numbersFelix Held
2023-04-21cpu/amd/pi/00730F01/fixme: use coreboot's PCI access functionsFelix Held
2023-04-21include/cpu/amd/mtrr: rename functions to get top of memory regionsFelix Held
2023-04-18src/cpu/power9: move part of scom.h to scom.cSergii Dmytruk
2023-04-17cpu,soc/intel: Separate single SSDT CPU entryKyösti Mälkki
2023-04-14cpu,soc/intel: Sync ACPI CPU object implementationsKyösti Mälkki
2023-04-14cpu,soc/intel: Use acpigen_write_processor_device()Elyes Haouas
2023-04-14cpu/intel/speedstep: Refactor P-state coordinationKyösti Mälkki
2023-04-14intel/i82371eb,speedstep: Use dev_count_cpu()Kyösti Mälkki
2023-04-13cpu/x86/mp_init.c: Set topology on BSPArthur Heymans
2023-04-06cpu/x86/topology: Add code to fill in topology on struct pathArthur Heymans
2023-04-06cpu/mp_init.c: Only enable CPUs once they execute codeArthur Heymans
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